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| author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2017-01-09 20:28:26 +0300 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2017-01-10 20:11:23 +0300 |
| commit | eab43e88734f4ef8cb5ec40827bf784400ed8ffc (patch) | |
| tree | 12f7502952afd9d77cc722b4d33184d0aa0760d2 /net/rds/tcp_recv.c | |
| parent | 564279ff6f1f4c5eba95f4addd6acd7b1531a653 (diff) | |
| download | linux-eab43e88734f4ef8cb5ec40827bf784400ed8ffc.tar.xz | |
arm64: cpufeature: Cleanup feature bit tables
This patch does the following clean ups :
1) All undescribed fields of a register are now treated as 'strict'
with a safe value of 0. Hence we could leave an empty table for
describing registers which are RAZ.
2) ID_AA64DFR1_EL1 is RAZ and should use the table for RAZ register.
3) ftr_generic32 is used to represent a register with a 32bit feature
value. Rename this to ftr_singl32 to make it more obvious. Since
we don't have a 64bit singe feature register, kill ftr_generic.
Based on a patch by Mark Rutland.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'net/rds/tcp_recv.c')
0 files changed, 0 insertions, 0 deletions