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authorJohn David Anglin <dave.anglin@bell.net>2021-11-09 00:48:16 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2021-11-18 21:17:14 +0300
commit8301503a728a5f578b472f82f1fa773885b6cd0e (patch)
tree57e312f2ba5b4994dacd6782aad5d4c07902d9de /mm/interval_tree.c
parent1dc7ce007aef5ce907764b8c78c15863e2b3b67f (diff)
downloadlinux-8301503a728a5f578b472f82f1fa773885b6cd0e.tar.xz
parisc: Flush kernel data mapping in set_pte_at() when installing pte for user page
commit 38860b2c8bb1b92f61396eb06a63adff916fc31d upstream. For years, there have been random segmentation faults in userspace on SMP PA-RISC machines. It occurred to me that this might be a problem in set_pte_at(). MIPS and some other architectures do cache flushes when installing PTEs with the present bit set. Here I have adapted the code in update_mmu_cache() to flush the kernel mapping when the kernel flush is deferred, or when the kernel mapping may alias with the user mapping. This simplifies calls to update_mmu_cache(). I also changed the barrier in set_pte() from a compiler barrier to a full memory barrier. I know this change is not sufficient to fix the problem. It might not be needed. I have had a few days of operation with 5.14.16 to 5.15.1 and haven't seen any random segmentation faults on rp3440 or c8000 so far. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de> Cc: stable@kernel.org # 5.12+ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'mm/interval_tree.c')
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