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| author | Sowjanya Komatineni <skomatineni@nvidia.com> | 2020-12-22 00:17:31 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-01-27 02:10:14 +0300 |
| commit | 88893986338beebcf5317bda80d43d4f6f7f7c7c (patch) | |
| tree | 6c5575ba3f087bd8e6f9e5afef8c837e3863b3bb /lib/mpi/mpiutil.c | |
| parent | 5c8fe583cce542aa0b84adc939ce85293de36e5e (diff) | |
| download | linux-88893986338beebcf5317bda80d43d4f6f7f7c7c.tar.xz | |
dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM
Tegra210 QSPI clock output has divider DIV2_SEL which will be enabled
when using DDR interface mode.
This patch adds clock ID for this to dt-binding.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'lib/mpi/mpiutil.c')
0 files changed, 0 insertions, 0 deletions