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| author | Zhao Yan <yan.y.zhao@intel.com> | 2017-02-28 10:41:03 +0300 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2017-03-01 05:12:36 +0300 |
| commit | 1f58af304cce9e4a25b62b3619e69c586203c8ca (patch) | |
| tree | b47a4a1f14b63fcbb9a952b15e062b05b3acc91f /lib/mpi/mpi-bit.c | |
| parent | 9112caafdf01439a6e43f4d8c09ceed7dc613d4a (diff) | |
| download | linux-1f58af304cce9e4a25b62b3619e69c586203c8ca.tar.xz | |
drm/i915/gvt: fix an error for one register
register 0x20e0 should be mode register
v2: rebased to latest code base
Signed-off-by: Zhao Yan <yan.y.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'lib/mpi/mpi-bit.c')
0 files changed, 0 insertions, 0 deletions