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| author | Shannon Zhao <shannon.zhao@linaro.org> | 2016-04-07 15:03:26 +0300 |
|---|---|---|
| committer | David Vrabel <david.vrabel@citrix.com> | 2016-07-06 12:34:44 +0300 |
| commit | 383ff518a79fe3dcece579b9d30be77b219d10f8 (patch) | |
| tree | c3f8bd4e8c9281d5207ef6cce8a88a7434b80b5e /include/xen | |
| parent | b6f0bcc23fa9cb32752cbf263d4014a21f132f92 (diff) | |
| download | linux-383ff518a79fe3dcece579b9d30be77b219d10f8.tar.xz | |
xen/hvm/params: Add a new delivery type for event-channel in HVM_PARAM_CALLBACK_IRQ
This new delivery type which is for ARM shares the same value with
HVM_PARAM_CALLBACK_TYPE_VECTOR which is for x86.
val[15:8] is flag: val[7:0] is a PPI.
To the flag, bit 8 stands the interrupt mode is edge(1) or level(0) and
bit 9 stands the interrupt polarity is active low(1) or high(0).
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Julien Grall <julien.grall@arm.com>
Tested-by: Julien Grall <julien.grall@arm.com>
Diffstat (limited to 'include/xen')
| -rw-r--r-- | include/xen/interface/hvm/params.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/include/xen/interface/hvm/params.h b/include/xen/interface/hvm/params.h index 70ad20834e13..4d61fc58d99d 100644 --- a/include/xen/interface/hvm/params.h +++ b/include/xen/interface/hvm/params.h @@ -47,11 +47,24 @@ * Domain = val[47:32], Bus = val[31:16] DevFn = val[15:8], IntX = val[1:0] */ +#if defined(__i386__) || defined(__x86_64__) #define HVM_PARAM_CALLBACK_TYPE_VECTOR 2 /* * val[7:0] is a vector number. Check for XENFEAT_hvm_callback_vector to know * if this delivery method is available. */ +#elif defined(__arm__) || defined(__aarch64__) +#define HVM_PARAM_CALLBACK_TYPE_PPI 2 +/* + * val[55:16] needs to be zero. + * val[15:8] is interrupt flag of the PPI used by event-channel: + * bit 8: the PPI is edge(1) or level(0) triggered + * bit 9: the PPI is active low(1) or high(0) + * val[7:0] is a PPI number used by event-channel. + * This is only used by ARM/ARM64 and masking/eoi the interrupt associated to + * the notification is handled by the interrupt controller. + */ +#endif #define HVM_PARAM_STORE_PFN 1 #define HVM_PARAM_STORE_EVTCHN 2 |