diff options
| author | Adrian Hunter <adrian.hunter@intel.com> | 2014-09-24 11:27:27 +0400 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2014-10-03 16:18:17 +0400 |
| commit | 615413979487a1e25a3b76abbaa316280ca19d26 (patch) | |
| tree | ac3e964bfd380f9bfe01b7c353fa64e9d0a6925f /include/linux/mmc | |
| parent | 89168b48991537bec2573b3b6a8841df74465b12 (diff) | |
| download | linux-615413979487a1e25a3b76abbaa316280ca19d26.tar.xz | |
mmc: sdhci: Add quirk for always getting TC with stop cmd
Add a quirk for a host controller that always sets
a Transfer Complete interrupt status for the stop
command even when a busy response is not indicated.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'include/linux/mmc')
| -rw-r--r-- | include/linux/mmc/sdhci.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h index 0aa85ca0c788..dba793e3a331 100644 --- a/include/linux/mmc/sdhci.h +++ b/include/linux/mmc/sdhci.h @@ -98,6 +98,8 @@ struct sdhci_host { #define SDHCI_QUIRK2_BROKEN_HS200 (1<<6) /* Controller does not support DDR50 */ #define SDHCI_QUIRK2_BROKEN_DDR50 (1<<7) +/* Stop command (CMD12) can set Transfer Complete when not using MMC_RSP_BUSY */ +#define SDHCI_QUIRK2_STOP_WITH_TC (1<<8) int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ |