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| author | Ard Biesheuvel <ardb@kernel.org> | 2024-02-27 18:19:09 +0300 |
|---|---|---|
| committer | Borislav Petkov (AMD) <bp@alien8.de> | 2024-03-04 20:11:34 +0300 |
| commit | dada8587068c820ba5e5d09b9c32d8bc28c4dbe6 (patch) | |
| tree | 90beaeb805776dc09ada64c2204febc41e74ef8b /include/linux/fpga/fpga-mgr.h | |
| parent | 721f791ce1cddfa5f2bf524ac14741bfa0f72697 (diff) | |
| download | linux-dada8587068c820ba5e5d09b9c32d8bc28c4dbe6.tar.xz | |
x86/startup_64: Simplify CR4 handling in startup code
When paging is enabled, the CR4.PAE and CR4.LA57 control bits cannot be
changed, and so they can simply be preserved rather than reason about
whether or not they need to be set. CR4.MCE should be preserved unless
the kernel was built without CONFIG_X86_MCE, in which case it must be
cleared.
CR4.PSE should be set explicitly, regardless of whether or not it was
set before.
CR4.PGE is set explicitly, and then cleared and set again after
programming CR3 in order to flush TLB entries based on global
translations. This makes the first assignment redundant, and can
therefore be omitted. So clear PGE by omitting it from the preserve
mask, and set it again explicitly after switching to the new page
tables.
[ bp: Document the exact operation of CR4.PGE ]
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Tested-by: Tom Lendacky <thomas.lendacky@amd.com>
Link: https://lore.kernel.org/r/20240227151907.387873-12-ardb+git@google.com
Diffstat (limited to 'include/linux/fpga/fpga-mgr.h')
0 files changed, 0 insertions, 0 deletions