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| author | Chris Mi <cmi@nvidia.com> | 2024-08-08 08:59:17 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2024-08-10 08:13:14 +0300 |
| commit | 6e20d538fb1dfb9c477a8e991da1fca3064ce0f7 (patch) | |
| tree | c06fa7c51c73d8784db30cf7f1abf05f3c016cb1 /include/linux/fpga/fpga-mgr.h | |
| parent | 1862923bf6ae9d023826abf79d9795a06aecb350 (diff) | |
| download | linux-6e20d538fb1dfb9c477a8e991da1fca3064ce0f7.tar.xz | |
net/mlx5: E-Switch, Increase max int port number for offload
Currently MLX5E_TC_MAX_INT_PORT_NUM is 8. Usually int port has one
ingress and one egress rules. But sometimes, a temporary rule can be
offloaded as well, eg:
recirc_id(0),in_port(br-phy),eth(src=10:70:fd:87:57:c0,dst=33:33:00:00:00:16),
eth_type(0x86dd),ipv6(frag=no), packets:2, bytes:180, used:0.060s,
actions:enp8s0f0
If one int port device offloads 3 rules, only 2 devices can offload.
Other devices will hit the limit and fail to offload. Actually it is
insufficient for customers. So increase the number to 32.
Signed-off-by: Chris Mi <cmi@nvidia.com>
Reviewed-by: Roi Dayan <roid@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20240808055927.2059700-2-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include/linux/fpga/fpga-mgr.h')
0 files changed, 0 insertions, 0 deletions