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authorPaul Burton <paul.burton@mips.com>2017-10-31 19:41:50 +0300
committerMarc Zyngier <marc.zyngier@arm.com>2017-11-02 18:55:47 +0300
commit5af3e93e16b39231f04623469eb4ac0e4406c0d1 (patch)
treea1086b5dd27ef67f475a04320c01f9e4c26e5f9f /include/linux/fpga/fpga-mgr.h
parent82857688ca749cc9a91ff1f4495cc20f834a9f7d (diff)
downloadlinux-5af3e93e16b39231f04623469eb4ac0e4406c0d1.tar.xz
irqchip: mips-gic: Share register writes in gic_set_type()
The gic_set_type() function included writes to the MIPS GIC polarity, trigger & dual-trigger registers in each case of a switch statement determining the IRQs type. This is all well & good when we only have a single cluster & thus a single GIC whose register we want to update. It will lead to significant duplication once we have multi-cluster support & multiple GICs to update. Refactor this such that we determine values for the polarity, trigger & dual-trigger registers and then have a single set of register writes following the switch statement. This will allow us to write the same values to each GIC in a multi-cluster system in a later patch, rather than needing to duplicate more register writes in each case. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'include/linux/fpga/fpga-mgr.h')
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