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authorArnd Bergmann <arnd@arndb.de>2022-09-23 18:34:19 +0300
committerArnd Bergmann <arnd@arndb.de>2022-09-23 18:34:20 +0300
commitb97e1e2faa3c611a61da7a26cc2e5ee83434ded0 (patch)
treee90620a19295b74d82f5d41926303584ba4cdd27 /include/dt-bindings
parenta30f202fdc27f527900d095d95765c6e646a8db1 (diff)
parente9aa77d413c903ba4cf7da3fe0b419cae5b97a81 (diff)
downloadlinux-b97e1e2faa3c611a61da7a26cc2e5ee83434ded0.tar.xz
Merge tag 'imx-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers change for 6.1: - Update i.MX8MP blk-ctrl driver to handle PCIe PHY reset bit. - Add interconnect support into i.MX8MP blk-ctrl driver, so that i.MX8MP NoC can be set up properly after related power domain is up. - Add blk-ctrl support for i.MX8MP HDMI HDCP/HRV and VPU block. - Add i.MX93 SRC power domain and MEDIA blk-ctrl driver. - Update imx8m-blk-ctrl driver to use genpd_xlate_onecell. * tag 'imx-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (26 commits) soc: imx: add i.MX93 media blk ctrl driver soc: imx: add i.MX93 SRC power domain driver soc: imx: imx8m-blk-ctrl: Use genpd_xlate_onecell soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR soc: imx: add icc paths for i.MX8MP hsio/hdmi blk ctrl soc: imx: add icc paths for i.MX8MP media blk ctrl dt-bindings: arm: imx: update fsl.yaml for imx8dxl dt-bindings: firmware: add missing resource IDs for imx8dxl dt-bindings: arm: Add i.MX8M Mini Gateworks GW7904 board dt-bindings: soc: add i.MX93 mediamix blk ctrl dt-bindings: soc: add i.MX93 SRC dt-bindings: mfd: syscon: Add i.MX93 blk ctrl system registers dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier dt-bindings: arm: fsl: Add Kontron BL i.MX8MM OSM-S board dt-bindings: arm: fsl: Rename compatibles for Kontron i.MX8MM SoM/board dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk ctrl dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrl ... Link: https://lore.kernel.org/r/20220918092806.2152700-2-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/imx8mm-clock.h1
-rw-r--r--include/dt-bindings/firmware/imx/rsrc.h7
-rw-r--r--include/dt-bindings/power/fsl,imx93-power.h15
-rw-r--r--include/dt-bindings/power/imx8mp-power.h6
4 files changed, 28 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/imx8mm-clock.h b/include/dt-bindings/clock/imx8mm-clock.h
index 47c6f7f9582c..1f768b2eeb1a 100644
--- a/include/dt-bindings/clock/imx8mm-clock.h
+++ b/include/dt-bindings/clock/imx8mm-clock.h
@@ -281,7 +281,6 @@
#define IMX8MM_CLK_CLKOUT2_DIV 256
#define IMX8MM_CLK_CLKOUT2 257
-
#define IMX8MM_CLK_END 258
#endif
diff --git a/include/dt-bindings/firmware/imx/rsrc.h b/include/dt-bindings/firmware/imx/rsrc.h
index 43885056557c..1675de05ad33 100644
--- a/include/dt-bindings/firmware/imx/rsrc.h
+++ b/include/dt-bindings/firmware/imx/rsrc.h
@@ -37,10 +37,14 @@
#define IMX_SC_R_DC_0_BLIT2 21
#define IMX_SC_R_DC_0_BLIT_OUT 22
#define IMX_SC_R_PERF 23
+#define IMX_SC_R_USB_1_PHY 24
#define IMX_SC_R_DC_0_WARP 25
+#define IMX_SC_R_V2X_MU_0 26
+#define IMX_SC_R_V2X_MU_1 27
#define IMX_SC_R_DC_0_VIDEO0 28
#define IMX_SC_R_DC_0_VIDEO1 29
#define IMX_SC_R_DC_0_FRAC0 30
+#define IMX_SC_R_V2X_MU_2 31
#define IMX_SC_R_DC_0 32
#define IMX_SC_R_GPU_2_PID0 33
#define IMX_SC_R_DC_0_PLL_0 34
@@ -49,7 +53,10 @@
#define IMX_SC_R_DC_1_BLIT1 37
#define IMX_SC_R_DC_1_BLIT2 38
#define IMX_SC_R_DC_1_BLIT_OUT 39
+#define IMX_SC_R_V2X_MU_3 40
+#define IMX_SC_R_V2X_MU_4 41
#define IMX_SC_R_DC_1_WARP 42
+#define IMX_SC_R_SECVIO 44
#define IMX_SC_R_DC_1_VIDEO0 45
#define IMX_SC_R_DC_1_VIDEO1 46
#define IMX_SC_R_DC_1_FRAC0 47
diff --git a/include/dt-bindings/power/fsl,imx93-power.h b/include/dt-bindings/power/fsl,imx93-power.h
new file mode 100644
index 000000000000..17f9f015bf7d
--- /dev/null
+++ b/include/dt-bindings/power/fsl,imx93-power.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Copyright 2022 NXP
+ */
+
+#ifndef __DT_BINDINGS_IMX93_POWER_H__
+#define __DT_BINDINGS_IMX93_POWER_H__
+
+#define IMX93_MEDIABLK_PD_MIPI_DSI 0
+#define IMX93_MEDIABLK_PD_MIPI_CSI 1
+#define IMX93_MEDIABLK_PD_PXP 2
+#define IMX93_MEDIABLK_PD_LCDIF 3
+#define IMX93_MEDIABLK_PD_ISI 4
+
+#endif
diff --git a/include/dt-bindings/power/imx8mp-power.h b/include/dt-bindings/power/imx8mp-power.h
index 7789bcca3223..2fe3c2abad13 100644
--- a/include/dt-bindings/power/imx8mp-power.h
+++ b/include/dt-bindings/power/imx8mp-power.h
@@ -49,5 +49,11 @@
#define IMX8MP_HDMIBLK_PD_TRNG 4
#define IMX8MP_HDMIBLK_PD_HDMI_TX 5
#define IMX8MP_HDMIBLK_PD_HDMI_TX_PHY 6
+#define IMX8MP_HDMIBLK_PD_HDCP 7
+#define IMX8MP_HDMIBLK_PD_HRV 8
+
+#define IMX8MP_VPUBLK_PD_G1 0
+#define IMX8MP_VPUBLK_PD_G2 1
+#define IMX8MP_VPUBLK_PD_VC8000E 2
#endif