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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2020-05-15 23:47:07 +0300
committerKevin Hilman <khilman@baylibre.com>2020-05-20 02:02:14 +0300
commitcc9ca02a40e549402eebdf151a8f0ca5027e0f7c (patch)
treee34b5833b0a0cada5eb19aa06088a714b7b32c4d /include/dt-bindings/power
parent18dfc0bf8167fb0dc729da4a6a816e34d754318b (diff)
downloadlinux-cc9ca02a40e549402eebdf151a8f0ca5027e0f7c.tar.xz
dt-bindings: power: meson-ee-pwrc: add support for the Meson GX SoCs
The power domains on the GX SoCs are very similar to G12A. The only known differences so far are: - The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the VPU power-domain) - The GX SoCs have an additional reset line called "dvin" Add a new compatible string and adjust the reset line expectations for these SoCs. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200515204709.1505498-3-martin.blumenstingl@googlemail.com
Diffstat (limited to 'include/dt-bindings/power')
-rw-r--r--include/dt-bindings/power/meson-gxbb-power.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/include/dt-bindings/power/meson-gxbb-power.h b/include/dt-bindings/power/meson-gxbb-power.h
new file mode 100644
index 000000000000..1262dac696c0
--- /dev/null
+++ b/include/dt-bindings/power/meson-gxbb-power.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#ifndef _DT_BINDINGS_MESON_GXBB_POWER_H
+#define _DT_BINDINGS_MESON_GXBB_POWER_H
+
+#define PWRC_GXBB_VPU_ID 0
+#define PWRC_GXBB_ETHERNET_MEM_ID 1
+
+#endif