diff options
| author | Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 2006-10-13 19:25:04 +0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-11-30 04:14:43 +0300 |
| commit | 56ae58333031bb0564c141f955d1e42276cade55 (patch) | |
| tree | de1e272dbebb07f268b6d9bc1fd553279f517ac8 /include/asm-mips/mach-cobalt/cobalt.h | |
| parent | 4e3884fc83f40b5daabceeee3a428a8ebebbbe4a (diff) | |
| download | linux-56ae58333031bb0564c141f955d1e42276cade55.tar.xz | |
[MIPS] Rewrite GALILEO_INL/GALILEO_OUTL to GT_READ/GT_WRITE
This patch has rewritten GALILEO_INL/GALILEO_OUTL using GT_READ/GT_WRITE.
This patch tested on Cobalt Qube2.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mach-cobalt/cobalt.h')
| -rw-r--r-- | include/asm-mips/mach-cobalt/cobalt.h | 29 |
1 files changed, 2 insertions, 27 deletions
diff --git a/include/asm-mips/mach-cobalt/cobalt.h b/include/asm-mips/mach-cobalt/cobalt.h index b3c5ecbec03c..00b0fc68d5cb 100644 --- a/include/asm-mips/mach-cobalt/cobalt.h +++ b/include/asm-mips/mach-cobalt/cobalt.h @@ -67,34 +67,9 @@ #define COBALT_BRD_ID_QUBE2 0x5 #define COBALT_BRD_ID_RAQ2 0x6 -/* - * Galileo chipset access macros for the Cobalt. The base address for - * the GT64111 chip is 0x14000000 - * - * Most of this really should go into a separate GT64111 header file. - */ -#define GT64111_IO_BASE 0x10000000UL -#define GT64111_IO_END 0x11ffffffUL -#define GT64111_MEM_BASE 0x12000000UL -#define GT64111_MEM_END 0x13ffffffUL -#define GT64111_BASE 0x14000000UL -#define GALILEO_REG(ofs) CKSEG1ADDR(GT64111_BASE + (unsigned long)(ofs)) - -#define GALILEO_INL(port) (*(volatile unsigned int *) GALILEO_REG(port)) -#define GALILEO_OUTL(val, port) \ -do { \ - *(volatile unsigned int *) GALILEO_REG(port) = (val); \ -} while (0) - -#define GALILEO_INTR_T0EXP (1 << 8) -#define GALILEO_INTR_RETRY_CTR (1 << 20) - -#define GALILEO_ENTC0 0x01 -#define GALILEO_SELTC0 0x02 - #define PCI_CFG_SET(devfn,where) \ - GALILEO_OUTL((0x80000000 | (PCI_SLOT (devfn) << 11) | \ - (PCI_FUNC (devfn) << 8) | (where)), GT_PCI0_CFGADDR_OFS) + GT_WRITE(GT_PCI0_CFGADDR_OFS, (0x80000000 | (PCI_SLOT (devfn) << 11) | \ + (PCI_FUNC (devfn) << 8) | (where))) #define COBALT_LED_PORT (*(volatile unsigned char *) CKSEG1ADDR(0x1c000000)) # define COBALT_LED_BAR_LEFT (1 << 0) /* Qube */ |