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author | Chunfeng Yun <chunfeng.yun@mediatek.com> | 2021-03-23 10:02:52 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-03-26 16:46:14 +0300 |
commit | b1a344589eeaa52be43fba1bde20d483e01018ff (patch) | |
tree | 4b0ebe271e3227367b91b7c5b5328bb19e8817cb /drivers/usb/mtu3/mtu3_host.c | |
parent | 331c505894e4da9b29ec7d7fa7c945e69823faee (diff) | |
download | linux-b1a344589eeaa52be43fba1bde20d483e01018ff.tar.xz |
usb: mtu3: support ip-sleep wakeup for MT8183
Add support ip-sleep wakeup for MT8183, it's similar to MT8173,
and it's also a specific one, but not following IPM rule.
Due to the index 2 already used by many DTS, it's better to keep
it unchanged for backward compatibility, treat specific ones without
following IPM rule as revision 1.x, meanwhile reserve 3~10 for later
revision that follows the IPM rule.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1616482975-17841-10-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/mtu3/mtu3_host.c')
-rw-r--r-- | drivers/usb/mtu3/mtu3_host.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/usb/mtu3/mtu3_host.c b/drivers/usb/mtu3/mtu3_host.c index 41a5675ac5ca..a746bebc93e9 100644 --- a/drivers/usb/mtu3/mtu3_host.c +++ b/drivers/usb/mtu3/mtu3_host.c @@ -24,6 +24,12 @@ #define WC1_IS_EN BIT(25) #define WC1_IS_P BIT(6) /* polarity for ip sleep */ +/* mt8183 */ +#define PERI_WK_CTRL0 0x0 +#define WC0_IS_C(x) ((u32)(((x) & 0xf) << 28)) /* cycle debounce */ +#define WC0_IS_P BIT(12) /* polarity */ +#define WC0_IS_EN BIT(6) + /* mt2712 etc */ #define PERI_SSUSB_SPM_CTRL 0x0 #define SSC_IP_SLEEP_EN BIT(4) @@ -32,6 +38,7 @@ enum ssusb_uwk_vers { SSUSB_UWK_V1 = 1, SSUSB_UWK_V2, + SSUSB_UWK_V1_1 = 101, /* specific revision 1.01 */ }; /* @@ -48,6 +55,11 @@ static void ssusb_wakeup_ip_sleep_set(struct ssusb_mtk *ssusb, bool enable) msk = WC1_IS_EN | WC1_IS_C(0xf) | WC1_IS_P; val = enable ? (WC1_IS_EN | WC1_IS_C(0x8)) : 0; break; + case SSUSB_UWK_V1_1: + reg = ssusb->uwk_reg_base + PERI_WK_CTRL0; + msk = WC0_IS_EN | WC0_IS_C(0xf) | WC0_IS_P; + val = enable ? (WC0_IS_EN | WC0_IS_C(0x8)) : 0; + break; case SSUSB_UWK_V2: reg = ssusb->uwk_reg_base + PERI_SSUSB_SPM_CTRL; msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN; |