diff options
author | Heikki Krogerus <heikki.krogerus@linux.intel.com> | 2015-03-18 13:55:13 +0300 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-03-27 01:04:42 +0300 |
commit | 23f5b3fdd04e89b4c67fd9ffa60a193d239acf0f (patch) | |
tree | a04625a6cd8f9a6cf8f10737a6ff2e323882f938 /drivers/tty | |
parent | 9001c07995fdd1f3657408c71bca7d6c5fb87fd3 (diff) | |
download | linux-23f5b3fdd04e89b4c67fd9ffa60a193d239acf0f.tar.xz |
serial: 8250_dw: only get the clock rate in one place
The clock rate is requested from a property called
"clock-frequency" in both dw8250_probe_of and
dw8250_probe_acpi. Moving the requests to dw8250_probe.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
-rw-r--r-- | drivers/tty/serial/8250/8250_dw.c | 30 |
1 files changed, 13 insertions, 17 deletions
diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index cc943fe3fd68..176f18f2e3ab 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -374,17 +374,6 @@ static int dw8250_probe_of(struct uart_port *p, data->msr_mask_off |= UART_MSR_TERI; } - /* clock got configured through clk api, all done */ - if (p->uartclk) - return 0; - - /* try to find out clock frequency from DT as fallback */ - if (of_property_read_u32(np, "clock-frequency", &val)) { - dev_err(p->dev, "clk or clock-frequency not defined\n"); - return -EINVAL; - } - p->uartclk = val; - return 0; } @@ -395,11 +384,6 @@ static int dw8250_probe_acpi(struct uart_8250_port *up, dw8250_setup_port(up); - if (!p->uartclk) - if (device_property_read_u32(p->dev, "clock-frequency", - &p->uartclk)) - return -EINVAL; - p->iotype = UPIO_MEM32; p->serial_in = dw8250_serial_in32; p->serial_out = dw8250_serial_out32; @@ -453,12 +437,18 @@ static int dw8250_probe(struct platform_device *pdev) return -ENOMEM; data->usr_reg = DW_UART_USR; + + /* Always ask for fixed clock rate from a property. */ + device_property_read_u32(&pdev->dev, "clock-frequency", + &uart.port.uartclk); + + /* If there is separate baudclk, get the rate from it. */ data->clk = devm_clk_get(&pdev->dev, "baudclk"); if (IS_ERR(data->clk) && PTR_ERR(data->clk) != -EPROBE_DEFER) data->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(data->clk) && PTR_ERR(data->clk) == -EPROBE_DEFER) return -EPROBE_DEFER; - if (!IS_ERR(data->clk)) { + if (!IS_ERR_OR_NULL(data->clk)) { err = clk_prepare_enable(data->clk); if (err) dev_warn(&pdev->dev, "could not enable optional baudclk: %d\n", @@ -467,6 +457,12 @@ static int dw8250_probe(struct platform_device *pdev) uart.port.uartclk = clk_get_rate(data->clk); } + /* If no clock rate is defined, fail. */ + if (!uart.port.uartclk) { + dev_err(&pdev->dev, "clock rate not defined\n"); + return -EINVAL; + } + data->pclk = devm_clk_get(&pdev->dev, "apb_pclk"); if (IS_ERR(data->clk) && PTR_ERR(data->clk) == -EPROBE_DEFER) { err = -EPROBE_DEFER; |