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| author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2020-04-09 14:23:32 +0300 |
|---|---|---|
| committer | Mika Westerberg <mika.westerberg@linux.intel.com> | 2020-09-03 12:06:41 +0300 |
| commit | 284652a4a49917e121277a6cacbefed9f65b94ca (patch) | |
| tree | d126165f7d01a7c19443ba8aefd3ac810a700a1b /drivers/thunderbolt/tb_regs.h | |
| parent | e28178bf566cf7281b513856aa71a8d41aa81154 (diff) | |
| download | linux-284652a4a49917e121277a6cacbefed9f65b94ca.tar.xz | |
thunderbolt: Configure port for XDomain
When the port is connected to another host it should be marked as such
in the USB4 port capability. This information is used by the router
during sleep and wakeup.
Also do the same for legacy switches via link controller vendor specific
registers.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/thunderbolt/tb_regs.h')
| -rw-r--r-- | drivers/thunderbolt/tb_regs.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h index fd4fc144d17f..a553be24f1c0 100644 --- a/drivers/thunderbolt/tb_regs.h +++ b/drivers/thunderbolt/tb_regs.h @@ -303,6 +303,7 @@ struct tb_regs_port_header { #define PORT_CS_18_TCM BIT(9) #define PORT_CS_19 0x13 #define PORT_CS_19_PC BIT(3) +#define PORT_CS_19_PID BIT(4) /* Display Port adapter registers */ #define ADP_DP_CS_0 0x00 @@ -417,7 +418,9 @@ struct tb_regs_hop { #define TB_LC_SX_CTRL 0x96 #define TB_LC_SX_CTRL_L1C BIT(16) +#define TB_LC_SX_CTRL_L1D BIT(17) #define TB_LC_SX_CTRL_L2C BIT(20) +#define TB_LC_SX_CTRL_L2D BIT(21) #define TB_LC_SX_CTRL_UPSTREAM BIT(30) #define TB_LC_SX_CTRL_SLP BIT(31) |