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authorSergio Paracuellos <sergio.paracuellos@gmail.com>2018-05-15 07:49:53 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-05-15 10:31:39 +0300
commit51c1771483fa986d9c27854f8f6de1b02db9d159 (patch)
tree887a62aad8d222f49df1ba533dba281d51f971af /drivers/staging/mt7621-gpio
parent9945024e183c19b2487cbbae64898bd9601118f6 (diff)
downloadlinux-51c1771483fa986d9c27854f8f6de1b02db9d159.tar.xz
staging: mt7621-gpio: fix some warnings because of lines exceeded 80 characters
This patch silence some complains of checkpatch script because of the use of long lines. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: NeilBrown <neil@brown.name> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/mt7621-gpio')
-rw-r--r--drivers/staging/mt7621-gpio/gpio-mt7621.c19
1 files changed, 13 insertions, 6 deletions
diff --git a/drivers/staging/mt7621-gpio/gpio-mt7621.c b/drivers/staging/mt7621-gpio/gpio-mt7621.c
index c9ef9361dea6..a6dcfdf6ad67 100644
--- a/drivers/staging/mt7621-gpio/gpio-mt7621.c
+++ b/drivers/staging/mt7621-gpio/gpio-mt7621.c
@@ -65,7 +65,9 @@ mtk_gpio_w32(struct mtk_gc *rg, u8 reg, u32 val)
static inline u32
mtk_gpio_r32(struct mtk_gc *rg, u8 reg)
{
- return ioread32(mediatek_gpio_membase + (reg * 0x10) + (rg->bank * 0x4));
+ u32 offset = (reg * 0x10) + (rg->bank * 0x4);
+
+ return ioread32(mediatek_gpio_membase + offset);
}
static void
@@ -140,7 +142,8 @@ mediatek_gpio_to_irq(struct gpio_chip *chip, unsigned int pin)
{
struct mtk_gc *rg = to_mediatek_gpio(chip);
- return irq_create_mapping(mediatek_gpio_irq_domain, pin + (rg->bank * MTK_BANK_WIDTH));
+ return irq_create_mapping(mediatek_gpio_irq_domain,
+ pin + (rg->bank * MTK_BANK_WIDTH));
}
static int
@@ -197,7 +200,8 @@ mediatek_gpio_irq_handler(struct irq_desc *desc)
pending = mtk_gpio_r32(rg, GPIO_REG_STAT);
for_each_set_bit(bit, &pending, MTK_BANK_WIDTH) {
- u32 map = irq_find_mapping(mediatek_gpio_irq_domain, (MTK_BANK_WIDTH * i) + bit);
+ u32 map = irq_find_mapping(mediatek_gpio_irq_domain,
+ (MTK_BANK_WIDTH * i) + bit);
generic_handle_irq(map);
mtk_gpio_w32(rg, GPIO_REG_STAT, BIT(bit));
@@ -287,9 +291,11 @@ static struct irq_chip mediatek_gpio_irq_chip = {
};
static int
-mediatek_gpio_gpio_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
+mediatek_gpio_gpio_map(struct irq_domain *d, unsigned int irq,
+ irq_hw_number_t hw)
{
- irq_set_chip_and_handler(irq, &mediatek_gpio_irq_chip, handle_level_irq);
+ irq_set_chip_and_handler(irq, &mediatek_gpio_irq_chip,
+ handle_level_irq);
irq_set_handler_data(irq, d);
return 0;
@@ -324,7 +330,8 @@ mediatek_gpio_probe(struct platform_device *pdev)
mediatek_gpio_bank_probe(pdev, bank);
if (mediatek_gpio_irq_domain)
- irq_set_chained_handler(mediatek_gpio_irq, mediatek_gpio_irq_handler);
+ irq_set_chained_handler(mediatek_gpio_irq,
+ mediatek_gpio_irq_handler);
return 0;
}