diff options
| author | Addy Ke <addy.ke@rock-chips.com> | 2014-10-15 15:25:49 +0400 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2014-10-15 17:05:38 +0400 |
| commit | f9cfd52262d36a55b39d41e2b0faae632ad57e4c (patch) | |
| tree | 751cc7e24e8abbc0374a71077ad438f2b99e256f /drivers/spi | |
| parent | a2285b8c75bf7e21895f7c2cf75d6a910914517b (diff) | |
| download | linux-f9cfd52262d36a55b39d41e2b0faae632ad57e4c.tar.xz | |
spi/rockchip: fix bug that case spi can't go as fast as slave request
Because the minimum divisor in rk3x's spi controller is 2,
if spi_clk is less than 2 * sclk_out, we can't get the right divisor.
So we must set spi_clk again to match slave request.
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi-rockchip.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index f96ea8a38d64..3044c6c27332 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -145,6 +145,9 @@ #define RXBUSY (1 << 0) #define TXBUSY (1 << 1) +/* sclk_out: spi master internal logic in rk3x can support 50Mhz */ +#define MAX_SCLK_OUT 50000000 + enum rockchip_ssi_type { SSI_MOTO_SPI = 0, SSI_TI_SSP, @@ -496,6 +499,15 @@ static void rockchip_spi_config(struct rockchip_spi *rs) dmacr |= RF_DMA_EN; } + if (WARN_ON(rs->speed > MAX_SCLK_OUT)) + rs->speed = MAX_SCLK_OUT; + + /* the minimum divsor is 2 */ + if (rs->max_freq < 2 * rs->speed) { + clk_set_rate(rs->spiclk, 2 * rs->speed); + rs->max_freq = clk_get_rate(rs->spiclk); + } + /* div doesn't support odd number */ div = max_t(u32, rs->max_freq / rs->speed, 1); div = (div + 1) & 0xfffe; |