diff options
author | Ben Dooks <ben.dooks@sifive.com> | 2022-09-13 09:18:15 +0300 |
---|---|---|
committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-10-13 21:06:54 +0300 |
commit | 696ab9bda22a770d079dc3a23bac9aaa553d98f4 (patch) | |
tree | b7125737bd2230377664d3d8f8cbd45990f3cfd1 /drivers/soc | |
parent | 3fb787e5bad50687a65ded7f3bb805cab70dff59 (diff) | |
download | linux-696ab9bda22a770d079dc3a23bac9aaa553d98f4.tar.xz |
soc: sifive: ccache: use pr_fmt() to remove CCACHE: prefixes
Use the pr_fmt() macro to prefix all the output with "CCACHE:"
to avoid having to write it out each time, or make a large diff
when the next change comes along.
Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20220913061817.22564-6-zong.li@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'drivers/soc')
-rw-r--r-- | drivers/soc/sifive/sifive_ccache.c | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/drivers/soc/sifive/sifive_ccache.c b/drivers/soc/sifive/sifive_ccache.c index 17080af7dfa0..91f0c2b32ea2 100644 --- a/drivers/soc/sifive/sifive_ccache.c +++ b/drivers/soc/sifive/sifive_ccache.c @@ -5,6 +5,9 @@ * Copyright (C) 2018-2022 SiFive, Inc. * */ + +#define pr_fmt(fmt) "CCACHE: " fmt + #include <linux/debugfs.h> #include <linux/interrupt.h> #include <linux/of_irq.h> @@ -85,13 +88,13 @@ static void ccache_config_read(void) cfg = readl(ccache_base + SIFIVE_CCACHE_CONFIG); - pr_info("CCACHE: %u banks, %u ways, sets/bank=%llu, bytes/block=%llu\n", + pr_info("%u banks, %u ways, sets/bank=%llu, bytes/block=%llu\n", (cfg & 0xff), (cfg >> 8) & 0xff, BIT_ULL((cfg >> 16) & 0xff), BIT_ULL((cfg >> 24) & 0xff)); cfg = readl(ccache_base + SIFIVE_CCACHE_WAYENABLE); - pr_info("CCACHE: Index of the largest way enabled: %u\n", cfg); + pr_info("Index of the largest way enabled: %u\n", cfg); } static const struct of_device_id sifive_ccache_ids[] = { @@ -155,7 +158,7 @@ static irqreturn_t ccache_int_handler(int irq, void *device) if (irq == g_irq[DIR_CORR]) { add_h = readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_HIGH); add_l = readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_LOW); - pr_err("CCACHE: DirError @ 0x%08X.%08X\n", add_h, add_l); + pr_err("DirError @ 0x%08X.%08X\n", add_h, add_l); /* Reading this register clears the DirError interrupt sig */ readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_COUNT); atomic_notifier_call_chain(&ccache_err_chain, @@ -175,7 +178,7 @@ static irqreturn_t ccache_int_handler(int irq, void *device) if (irq == g_irq[DATA_CORR]) { add_h = readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_HIGH); add_l = readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_LOW); - pr_err("CCACHE: DataError @ 0x%08X.%08X\n", add_h, add_l); + pr_err("DataError @ 0x%08X.%08X\n", add_h, add_l); /* Reading this register clears the DataError interrupt sig */ readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_COUNT); atomic_notifier_call_chain(&ccache_err_chain, @@ -185,7 +188,7 @@ static irqreturn_t ccache_int_handler(int irq, void *device) if (irq == g_irq[DATA_UNCORR]) { add_h = readl(ccache_base + SIFIVE_CCACHE_DATECCFAIL_HIGH); add_l = readl(ccache_base + SIFIVE_CCACHE_DATECCFAIL_LOW); - pr_err("CCACHE: DataFail @ 0x%08X.%08X\n", add_h, add_l); + pr_err("DataFail @ 0x%08X.%08X\n", add_h, add_l); /* Reading this register clears the DataFail interrupt sig */ readl(ccache_base + SIFIVE_CCACHE_DATECCFAIL_COUNT); atomic_notifier_call_chain(&ccache_err_chain, @@ -218,7 +221,7 @@ static int __init sifive_ccache_init(void) intr_num = of_property_count_u32_elems(np, "interrupts"); if (!intr_num) { - pr_err("CCACHE: no interrupts property\n"); + pr_err("No interrupts property\n"); return -ENODEV; } @@ -227,7 +230,7 @@ static int __init sifive_ccache_init(void) rc = request_irq(g_irq[i], ccache_int_handler, 0, "ccache_ecc", NULL); if (rc) { - pr_err("CCACHE: Could not request IRQ %d\n", g_irq[i]); + pr_err("Could not request IRQ %d\n", g_irq[i]); return rc; } } |