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authorJijie Shao <shaojijie@huawei.com>2024-12-16 07:05:31 +0300
committerJakub Kicinski <kuba@kernel.org>2024-12-18 07:01:39 +0300
commit3f5a61f6d504f55ed1a36cce044d5123d508721f (patch)
tree50e8f7bee3de6bc86dfc977f61d7d99e7cf1c6fb /drivers/pwm/pwm-stm32.c
parent3a03763f38769707a4dd0ca44474806fed3a7f81 (diff)
downloadlinux-3f5a61f6d504f55ed1a36cce044d5123d508721f.tar.xz
net: hibmcge: Add reset supported in this module
Sometimes, if the port doesn't work, we can try to fix it by resetting it. This patch supports reset triggered by ethtool or FLR of PCIe, For example: ethtool --reset eth0 dedicated echo 1 > /sys/bus/pci/devices/0000\:83\:00.1/reset We hope that the reset can be performed only when the port is down, and the port cannot be up during the reset. Therefore, the entire reset process is protected by the rtnl lock. After the reset is complete, the hardware registers are restored to their default values. Therefore, some rebuild operations are required to rewrite the user configuration to the registers. Signed-off-by: Jijie Shao <shaojijie@huawei.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20241216040532.1566229-7-shaojijie@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/pwm/pwm-stm32.c')
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