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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2018-07-25 15:42:08 +0300
committerLinus Walleij <linus.walleij@linaro.org>2018-07-30 00:28:44 +0300
commit55aedef50d4d810670916d9fce4a40d5da2079e7 (patch)
tree469a24989a9c682809fc581810a0387181a4f746 /drivers/pinctrl/tegra
parentb4859f3edb47825f62d1b2efdd75fe7945996f49 (diff)
downloadlinux-55aedef50d4d810670916d9fce4a40d5da2079e7.tar.xz
pinctrl: intel: Do pin translation when lock IRQ
Default GPIOLIB callbacks for request and release IRQ do not do a GPIO to pin translation which is necessary for Intel hardware, such as Intel Cannonlake. Absence of the translation prevents some pins to be locked as IRQ due to direction check. Introduce own callbacks to make translation possible to avoid above issue. Fixes: a60eac3239f0 ("pinctrl: intel: Allow custom GPIO base for pad groups") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/tegra')
0 files changed, 0 insertions, 0 deletions