diff options
| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-01-09 00:31:15 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2017-01-09 17:41:51 +0300 |
| commit | 578db85f6777efedfc5b47a34f5b6576caa29eac (patch) | |
| tree | a6aba61297e71602789987f6c16f91b3ca1692ca /drivers/pinctrl/sunxi/pinctrl-sunxi.h | |
| parent | 3429fb3cda34f28ca2942ccc4fa7a7865b3ed978 (diff) | |
| download | linux-578db85f6777efedfc5b47a34f5b6576caa29eac.tar.xz | |
pinctrl: sunxi: Add pinctrl variants
Some SoCs are either supposed to be pin compatible (A10 and A20 for
example), or are just repackaged versions of the same die (A10s, A13, GR8).
In those case, having a full blown pinctrl driver just introduces
duplication in both data size and maintainance effort.
Add a variant option to both pins and functions to be able to limit the
pins and functions described only to a subset of the SoC we support with a
given driver.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi/pinctrl-sunxi.h')
| -rw-r--r-- | drivers/pinctrl/sunxi/pinctrl-sunxi.h | 26 |
1 files changed, 24 insertions, 2 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h index f78a44a03189..539a3dd2d868 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h @@ -83,6 +83,7 @@ #define SUN4I_FUNC_IRQ 6 struct sunxi_desc_function { + unsigned long variant; const char *name; u8 muxval; u8 irqbank; @@ -91,6 +92,7 @@ struct sunxi_desc_function { struct sunxi_desc_pin { struct pinctrl_pin_desc pin; + unsigned long variant; struct sunxi_desc_function *functions; }; @@ -128,6 +130,7 @@ struct sunxi_pinctrl { unsigned *irq_array; spinlock_t lock; struct pinctrl_dev *pctl_dev; + unsigned long variant; }; #define SUNXI_PIN(_pin, ...) \ @@ -137,12 +140,27 @@ struct sunxi_pinctrl { __VA_ARGS__, { } }, \ } +#define SUNXI_PIN_VARIANT(_pin, _variant, ...) \ + { \ + .pin = _pin, \ + .variant = _variant, \ + .functions = (struct sunxi_desc_function[]){ \ + __VA_ARGS__, { } }, \ + } + #define SUNXI_FUNCTION(_val, _name) \ { \ .name = _name, \ .muxval = _val, \ } +#define SUNXI_FUNCTION_VARIANT(_val, _name, _variant) \ + { \ + .name = _name, \ + .muxval = _val, \ + .variant = _variant, \ + } + #define SUNXI_FUNCTION_IRQ(_val, _irq) \ { \ .name = "irq", \ @@ -290,7 +308,11 @@ static inline u32 sunxi_irq_status_offset(u16 irq) return irq_num * IRQ_STATUS_IRQ_BITS; } -int sunxi_pinctrl_init(struct platform_device *pdev, - const struct sunxi_pinctrl_desc *desc); +int sunxi_pinctrl_init_with_variant(struct platform_device *pdev, + const struct sunxi_pinctrl_desc *desc, + unsigned long variant); + +#define sunxi_pinctrl_init(_dev, _desc) \ + sunxi_pinctrl_init_with_variant(_dev, _desc, 0) #endif /* __PINCTRL_SUNXI_H */ |