diff options
| author | Basavaraj Natikar <Basavaraj.Natikar@amd.com> | 2022-12-08 12:37:04 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2022-12-29 03:59:41 +0300 |
| commit | df72b4a692b60d3e5d99d9ef662b2d03c44bb9c0 (patch) | |
| tree | ccc5dbb3c719c5628c03183ed23b3976cf9ffbf0 /drivers/pinctrl/pinctrl-amd.c | |
| parent | 1b929c02afd37871d5afb9d498426f83432e71c2 (diff) | |
| download | linux-df72b4a692b60d3e5d99d9ef662b2d03c44bb9c0.tar.xz | |
pinctrl: amd: Add Z-state wake control bits
GPIO registers include Bit 27 for WakeCntrlZ used to enable wake in
Z state. Hence add Z-state wake control bits to debugfs output to
debug and analyze Z-states problems.
Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Suggested-by: Mario Limonciello <mario.limonciello@amd.com>
Tested-by: Guruvendra Punugupati <Guruvendra.Punugupati@amd.com>
Link: https://lore.kernel.org/r/20221208093704.1151928-1-Basavaraj.Natikar@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-amd.c')
| -rw-r--r-- | drivers/pinctrl/pinctrl-amd.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index 9bc6e3922e78..ce3893dc85e6 100644 --- a/drivers/pinctrl/pinctrl-amd.c +++ b/drivers/pinctrl/pinctrl-amd.c @@ -218,6 +218,7 @@ static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc) char *orientation; char debounce_value[40]; char *debounce_enable; + char *wake_cntrlz; for (bank = 0; bank < gpio_dev->hwbank_num; bank++) { unsigned int time = 0; @@ -305,6 +306,12 @@ static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc) wake_cntrl2 = " ∅"; seq_printf(s, "S4/S5 %s| ", wake_cntrl2); + if (pin_reg & BIT(WAKECNTRL_Z_OFF)) + wake_cntrlz = "⏰"; + else + wake_cntrlz = " ∅"; + seq_printf(s, "Z %s| ", wake_cntrlz); + if (pin_reg & BIT(PULL_UP_ENABLE_OFF)) { pull_up_enable = "+"; if (pin_reg & BIT(PULL_UP_SEL_OFF)) |