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author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-03-11 21:12:50 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-03-11 21:12:50 +0300 |
commit | cf0240a755b8b3df51b0b857b03309a666611d58 (patch) | |
tree | 1915ac89b55b52a156dd921944fff62980fa1429 /drivers/pinctrl/meson | |
parent | 4f0237062ca70c8e34e16e518aee4b84c30d1832 (diff) | |
parent | 9bc8fee96e9a4b8f17ba1544bf323f1ae6ded81d (diff) | |
download | linux-cf0240a755b8b3df51b0b857b03309a666611d58.tar.xz |
Merge tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is a calm cycle, not much happened this time around: not even
much incremental development. Some three new drivers, that is all.
No core changes.
New drivers:
- NXP (ex Freescale) i.MX 8QM driver.
- NXP (ex Freescale) i.MX 8MM driver.
- AT91 SAM9X60 subdriver.
Improvements:
- Support for external interrups (EINT) on Mediatek virtual GPIOs.
- Make BCM2835 pin config fully generic.
- Lots of Renesas SH-PFC incremental improvements"
* tag 'pinctrl-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (70 commits)
pinctrl: imx: fix scu link errors
dt-bindings: pinctrl: Document the i.MX50 IOMUXC binding
pinctrl: qcom: spmi-gpio: Reorder debug print
pinctrl: nomadik: fix possible object reference leak
pinctrl: stm32: return error upon hwspinlock failure
pinctrl: stm32: fix memory leak issue
pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functions
pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions
pinctrl: sh-pfc: Validate fixed-size field widths at build time
pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groups
pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group
pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group
pinctrl: sh-pfc: emev2: Add missing pinmux functions
pinctrl: sunxi: Support I/O bias voltage setting on A80
pinctrl: ingenic: Add LCD pins for the JZ4725B SoC
pinctrl: samsung: Remove legacy API for handling external wakeup interrupts mask
pinctrl: bcm2835: Direct GPIO config changes to generic pinctrl
pinctrl: bcm2835: declare pin config as generic
pinctrl: qcom: qcs404: Drop unused UFS_RESET macro
dt-bindings: add documentation for slew rate
...
Diffstat (limited to 'drivers/pinctrl/meson')
-rw-r--r-- | drivers/pinctrl/meson/pinctrl-meson.c | 24 | ||||
-rw-r--r-- | drivers/pinctrl/meson/pinctrl-meson.h | 1 | ||||
-rw-r--r-- | drivers/pinctrl/meson/pinctrl-meson8b.c | 6 |
3 files changed, 22 insertions, 9 deletions
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index ea87d739f534..96a4a72708e4 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -31,6 +31,9 @@ * In some cases the register ranges for pull enable and pull * direction are the same and thus there are only 3 register ranges. * + * Since Meson G12A SoC, the ao register ranges for gpio, pull enable + * and pull direction are the same, so there are only 2 register ranges. + * * For the pull and GPIO configuration every bank uses a contiguous * set of bits in the register sets described above; the same register * can be shared by more banks with different offsets. @@ -488,21 +491,26 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc, return PTR_ERR(pc->reg_mux); } - pc->reg_pull = meson_map_resource(pc, gpio_np, "pull"); - if (IS_ERR(pc->reg_pull)) { - dev_err(pc->dev, "pull registers not found\n"); - return PTR_ERR(pc->reg_pull); + pc->reg_gpio = meson_map_resource(pc, gpio_np, "gpio"); + if (IS_ERR(pc->reg_gpio)) { + dev_err(pc->dev, "gpio registers not found\n"); + return PTR_ERR(pc->reg_gpio); } + pc->reg_pull = meson_map_resource(pc, gpio_np, "pull"); + /* Use gpio region if pull one is not present */ + if (IS_ERR(pc->reg_pull)) + pc->reg_pull = pc->reg_gpio; + pc->reg_pullen = meson_map_resource(pc, gpio_np, "pull-enable"); /* Use pull region if pull-enable one is not present */ if (IS_ERR(pc->reg_pullen)) pc->reg_pullen = pc->reg_pull; - pc->reg_gpio = meson_map_resource(pc, gpio_np, "gpio"); - if (IS_ERR(pc->reg_gpio)) { - dev_err(pc->dev, "gpio registers not found\n"); - return PTR_ERR(pc->reg_gpio); + pc->reg_ds = meson_map_resource(pc, gpio_np, "ds"); + if (IS_ERR(pc->reg_ds)) { + dev_dbg(pc->dev, "ds registers not found - skipping\n"); + pc->reg_ds = NULL; } return 0; diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h index eff61ea1c67e..5eaab925f427 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -120,6 +120,7 @@ struct meson_pinctrl { struct regmap *reg_pullen; struct regmap *reg_pull; struct regmap *reg_gpio; + struct regmap *reg_ds; struct gpio_chip chip; struct device_node *of_node; }; diff --git a/drivers/pinctrl/meson/pinctrl-meson8b.c b/drivers/pinctrl/meson/pinctrl-meson8b.c index 0f140a802137..7f76000cc12e 100644 --- a/drivers/pinctrl/meson/pinctrl-meson8b.c +++ b/drivers/pinctrl/meson/pinctrl-meson8b.c @@ -346,6 +346,8 @@ static const unsigned int eth_rx_dv_pins[] = { DIF_1_P }; static const unsigned int eth_rx_clk_pins[] = { DIF_1_N }; static const unsigned int eth_txd0_1_pins[] = { DIF_2_P }; static const unsigned int eth_txd1_1_pins[] = { DIF_2_N }; +static const unsigned int eth_rxd3_pins[] = { DIF_2_P }; +static const unsigned int eth_rxd2_pins[] = { DIF_2_N }; static const unsigned int eth_tx_en_pins[] = { DIF_3_P }; static const unsigned int eth_ref_clk_pins[] = { DIF_3_N }; static const unsigned int eth_mdc_pins[] = { DIF_4_P }; @@ -599,6 +601,8 @@ static struct meson_pmx_group meson8b_cbus_groups[] = { GROUP(eth_ref_clk, 6, 8), GROUP(eth_mdc, 6, 9), GROUP(eth_mdio_en, 6, 10), + GROUP(eth_rxd3, 7, 22), + GROUP(eth_rxd2, 7, 23), }; static struct meson_pmx_group meson8b_aobus_groups[] = { @@ -748,7 +752,7 @@ static const char * const ethernet_groups[] = { "eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1", "eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv", "eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk", - "eth_txd2", "eth_txd3" + "eth_txd2", "eth_txd3", "eth_rxd3", "eth_rxd2" }; static const char * const i2c_a_groups[] = { |