diff options
| author | Shawn Lin <shawn.lin@rock-chips.com> | 2018-05-09 04:12:24 +0300 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2018-05-10 14:05:39 +0300 |
| commit | 3593709f2651daf549bcc43c7431e867786de688 (patch) | |
| tree | 2c3e4d79db5247986485b9ac28f809d36ad7ca5b /drivers/pci/host/pcie-rockchip.h | |
| parent | 964bac9455bee7c1a0812dfbc212182c1a86c274 (diff) | |
| download | linux-3593709f2651daf549bcc43c7431e867786de688.tar.xz | |
PCI: rockchip: Split out common function to init controller
Most of the initialization are used for both of RC driver and
EP driver; factor the initialization out to a new function,
rockchip_pcie_init_port(), in pcie-rockchip.c and rename the
original function to rockchip_pcie_host_init_port() to avoid
confusion. No functional changed intended.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Diffstat (limited to 'drivers/pci/host/pcie-rockchip.h')
| -rw-r--r-- | drivers/pci/host/pcie-rockchip.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/pci/host/pcie-rockchip.h b/drivers/pci/host/pcie-rockchip.h index 473e74f85749..6f6e7adf0331 100644 --- a/drivers/pci/host/pcie-rockchip.h +++ b/drivers/pci/host/pcie-rockchip.h @@ -27,10 +27,12 @@ #define PCIE_CLIENT_BASE 0x0 #define PCIE_CLIENT_CONFIG (PCIE_CLIENT_BASE + 0x00) #define PCIE_CLIENT_CONF_ENABLE HIWORD_UPDATE_BIT(0x0001) +#define PCIE_CLIENT_CONF_DISABLE HIWORD_UPDATE(0x0001, 0) #define PCIE_CLIENT_LINK_TRAIN_ENABLE HIWORD_UPDATE_BIT(0x0002) #define PCIE_CLIENT_ARI_ENABLE HIWORD_UPDATE_BIT(0x0008) #define PCIE_CLIENT_CONF_LANE_NUM(x) HIWORD_UPDATE(0x0030, ENCODE_LANES(x)) #define PCIE_CLIENT_MODE_RC HIWORD_UPDATE_BIT(0x0040) +#define PCIE_CLIENT_MODE_EP HIWORD_UPDATE(0x0040, 0) #define PCIE_CLIENT_GEN_SEL_1 HIWORD_UPDATE(0x0080, 0) #define PCIE_CLIENT_GEN_SEL_2 HIWORD_UPDATE_BIT(0x0080) #define PCIE_CLIENT_DEBUG_OUT_0 (PCIE_CLIENT_BASE + 0x3c) @@ -237,6 +239,7 @@ static void rockchip_pcie_write(struct rockchip_pcie *rockchip, u32 val, } int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip); +int rockchip_pcie_init_port(struct rockchip_pcie *rockchip); int rockchip_pcie_get_phys(struct rockchip_pcie *rockchip); void rockchip_pcie_deinit_phys(struct rockchip_pcie *rockchip); int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip); |