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authorIngo Molnar <mingo@kernel.org>2020-02-24 13:36:09 +0300
committerIngo Molnar <mingo@kernel.org>2020-02-24 13:36:09 +0300
commit546121b65f47384e11ec1fa2e55449fc9f4846b2 (patch)
tree8f18470ec7c0c77b0f48eb1b2338e591b0b0aaff /drivers/pci/controller/dwc/pcie-artpec6.c
parent000619680c3714020ce9db17eef6a4a7ce2dc28b (diff)
parentf8788d86ab28f61f7b46eb6be375f8a726783636 (diff)
downloadlinux-546121b65f47384e11ec1fa2e55449fc9f4846b2.tar.xz
Merge tag 'v5.6-rc3' into sched/core, to pick up fixes and dependent patches
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-artpec6.c')
-rw-r--r--drivers/pci/controller/dwc/pcie-artpec6.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/drivers/pci/controller/dwc/pcie-artpec6.c b/drivers/pci/controller/dwc/pcie-artpec6.c
index 9e2482bd7b6d..28d5a1095200 100644
--- a/drivers/pci/controller/dwc/pcie-artpec6.c
+++ b/drivers/pci/controller/dwc/pcie-artpec6.c
@@ -51,9 +51,6 @@ static const struct of_device_id artpec6_pcie_of_match[];
#define ACK_N_FTS_MASK GENMASK(15, 8)
#define ACK_N_FTS(x) (((x) << 8) & ACK_N_FTS_MASK)
-#define FAST_TRAINING_SEQ_MASK GENMASK(7, 0)
-#define FAST_TRAINING_SEQ(x) (((x) << 0) & FAST_TRAINING_SEQ_MASK)
-
/* ARTPEC-6 specific registers */
#define PCIECFG 0x18
#define PCIECFG_DBG_OEN BIT(24)
@@ -313,10 +310,7 @@ static void artpec6_pcie_set_nfts(struct artpec6_pcie *artpec6_pcie)
* Set the Number of Fast Training Sequences that the core
* advertises as its N_FTS during Gen2 or Gen3 link training.
*/
- val = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL);
- val &= ~FAST_TRAINING_SEQ_MASK;
- val |= FAST_TRAINING_SEQ(180);
- dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val);
+ dw_pcie_link_set_n_fts(pci, 180);
}
static void artpec6_pcie_assert_core_reset(struct artpec6_pcie *artpec6_pcie)