diff options
| author | Johannes Berg <johannes@sipsolutions.net> | 2009-06-13 13:20:26 +0400 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2009-06-15 23:05:57 +0400 |
| commit | 3b319aae4244f9b4758212605f67cf63207a4fa1 (patch) | |
| tree | 52a06f91c8a4d8784904bb46cbc2a0581ece7069 /drivers/net/wireless/ath/ath9k/hw.c | |
| parent | 159cd468bc885f7a2fbc75bbfe782782e52ef9c9 (diff) | |
| download | linux-3b319aae4244f9b4758212605f67cf63207a4fa1.tar.xz | |
ath9k: port to cfg80211 rfkill
This ports the ath9k rfkill code to the new API offered by
cfg80211 and thus removes a lot of useless stuff.
("With this series a kernel panic, which is a regression, during module
unload disappears." -- Vasanthakumar Thiagarajan <vasanth@atheros.com>
Other patches in the series:
ath9k: Add helper to get ath9k specific current channel
ath9k: Make sure we have current channel in ah_curchan before rf
disable/enable
-- JWL)
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Cc: Luis Rodriguez <mcgrof@gmail.com>
Tested-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.c')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 29 |
1 files changed, 13 insertions, 16 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 1579c9407ed5..34935a8ee59d 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c @@ -2186,6 +2186,18 @@ static void ath9k_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask); } +static void ath9k_enable_rfkill(struct ath_hw *ah) +{ + REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, + AR_GPIO_INPUT_EN_VAL_RFSILENT_BB); + + REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2, + AR_GPIO_INPUT_MUX2_RFSILENT); + + ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio); + REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB); +} + int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, bool bChannelChange) { @@ -2313,10 +2325,9 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, ath9k_hw_init_interrupt_masks(ah, ah->opmode); ath9k_hw_init_qos(ah); -#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE) if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT) ath9k_enable_rfkill(ah); -#endif + ath9k_hw_init_user_settings(ah); REG_WRITE(ah, AR_STA_ID1, @@ -3613,20 +3624,6 @@ void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val) AR_GPIO_BIT(gpio)); } -#if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE) -void ath9k_enable_rfkill(struct ath_hw *ah) -{ - REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, - AR_GPIO_INPUT_EN_VAL_RFSILENT_BB); - - REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2, - AR_GPIO_INPUT_MUX2_RFSILENT); - - ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio); - REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB); -} -#endif - u32 ath9k_hw_getdefantenna(struct ath_hw *ah) { return REG_READ(ah, AR_DEF_ANTENNA) & 0x7; |