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| author | Corentin Labbe <clabbe.montjoie@gmail.com> | 2017-09-01 14:56:03 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-09-01 20:26:31 +0300 |
| commit | c642bbbc72d4d5165da7c8477d13791f5943dd05 (patch) | |
| tree | cb32e935b511e64869f6d345c7ee3e7bb02b66bc /drivers/net/phy/Kconfig | |
| parent | 1e4ccf363721d33d85f902c61a7f50513689b2cb (diff) | |
| download | linux-c642bbbc72d4d5165da7c8477d13791f5943dd05.tar.xz | |
net: mdio-mux-mmioreg: Can handle 8/16/32 bits registers
This patch fix an old information that mdio-mux-mmioreg can only handle
8bit registers.
This is not true anymore.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/Kconfig')
| -rw-r--r-- | drivers/net/phy/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 5afe6fdcc968..a9d16a3af514 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -85,7 +85,7 @@ config MDIO_BUS_MUX_MMIOREG parent bus. Child bus selection is under the control of one of the FPGA's registers. - Currently, only 8-bit registers are supported. + Currently, only 8/16/32 bits registers are supported. config MDIO_CAVIUM tristate |