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authorIoana Ciornei <ioana.ciornei@nxp.com>2021-03-22 23:58:56 +0300
committerDavid S. Miller <davem@davemloft.net>2021-03-23 02:37:44 +0300
commit1e7cbabfdb12aa944ae0cb03871f8b55ede1341a (patch)
tree5835454d5da8c9ad2d3ccbf3e85e4e28e4286725 /drivers/net/ethernet/freescale/dpaa2/dpsw-cmd.h
parentf054e3e217e40ed343a0cea8c68cc053d40f81bd (diff)
downloadlinux-1e7cbabfdb12aa944ae0cb03871f8b55ede1341a.tar.xz
dpaa2-switch: add support for configuring learning state per port
Add support for configuring the learning state of a switch port. When the user requests the HW learning to be disabled, a fast-age procedure on that specific port is run so that previously learnt addresses do not linger. At device probe as well as on a bridge leave action, the ports are configured with HW learning disabled since they are basically a standalone port. At the same time, at bridge join we inherit the bridge port BR_LEARNING flag state and configure it on the switch port. There were already some MC firmware ABI functions for changing the learning state, but those were per FDB (bridging domain) and not per port so we need to adjust those to use the new MC fw command which is per port. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/freescale/dpaa2/dpsw-cmd.h')
-rw-r--r--drivers/net/ethernet/freescale/dpaa2/dpsw-cmd.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/ethernet/freescale/dpaa2/dpsw-cmd.h b/drivers/net/ethernet/freescale/dpaa2/dpsw-cmd.h
index 996a59dcd01d..24b17d6e09af 100644
--- a/drivers/net/ethernet/freescale/dpaa2/dpsw-cmd.h
+++ b/drivers/net/ethernet/freescale/dpaa2/dpsw-cmd.h
@@ -83,6 +83,7 @@
#define DPSW_CMDID_CTRL_IF_SET_QUEUE DPSW_CMD_ID(0x0A6)
#define DPSW_CMDID_SET_EGRESS_FLOOD DPSW_CMD_ID(0x0AC)
+#define DPSW_CMDID_IF_SET_LEARNING_MODE DPSW_CMD_ID(0x0AD)
/* Macros for accessing command fields smaller than 1byte */
#define DPSW_MASK(field) \
@@ -447,5 +448,14 @@ struct dpsw_cmd_set_egress_flood {
u8 pad[5];
__le64 if_id;
};
+
+#define DPSW_LEARNING_MODE_SHIFT 0
+#define DPSW_LEARNING_MODE_SIZE 4
+
+struct dpsw_cmd_if_set_learning_mode {
+ __le16 if_id;
+ /* only the first 4 bits from LSB */
+ u8 mode;
+};
#pragma pack(pop)
#endif /* __FSL_DPSW_CMD_H */