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authorPiotr Sroka <piotrs@cadence.com>2019-10-30 10:45:09 +0300
committerMiquel Raynal <miquel.raynal@bootlin.com>2019-10-30 11:22:13 +0300
commit777260a5c99226cfa58325b6a7c2f39bb46f5aaf (patch)
treec522318f41f3d078776ea16d92fb1c3484076a84 /drivers/mtd
parent29d9640bb537bbe0c37ffd672ff56b73e4aa3252 (diff)
downloadlinux-777260a5c99226cfa58325b6a7c2f39bb46f5aaf.tar.xz
mtd: rawnand: remove unecessary checking if dmac is NULL
Remove unecessary checking if dmac is NULL. If Cadence nand controller driver uses DMA engine then cdns_ctrl->dmac cannot be NULL. It is verified during driver initialization. If Cadence nand controller driver does not use DMA engine then CPU IO read/write are executed instead of slave DMA transfer. In that case cdns_ctrl->dmac is not used at all. Reported-by: kbuild test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Piotr Sroka <piotrs@cadence.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/raw/cadence-nand-controller.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mtd/nand/raw/cadence-nand-controller.c b/drivers/mtd/nand/raw/cadence-nand-controller.c
index 28a0426cb16e..3a36285a8d8a 100644
--- a/drivers/mtd/nand/raw/cadence-nand-controller.c
+++ b/drivers/mtd/nand/raw/cadence-nand-controller.c
@@ -1886,7 +1886,7 @@ static int cadence_nand_read_buf(struct cdns_nand_ctrl *cdns_ctrl,
return 0;
}
- if (cdns_ctrl->dmac && cadence_nand_dma_buf_ok(cdns_ctrl, buf, len)) {
+ if (cadence_nand_dma_buf_ok(cdns_ctrl, buf, len)) {
status = cadence_nand_slave_dma_transfer(cdns_ctrl, buf,
cdns_ctrl->io.dma,
len, DMA_FROM_DEVICE);
@@ -1940,7 +1940,7 @@ static int cadence_nand_write_buf(struct cdns_nand_ctrl *cdns_ctrl,
return 0;
}
- if (cdns_ctrl->dmac && cadence_nand_dma_buf_ok(cdns_ctrl, buf, len)) {
+ if (cadence_nand_dma_buf_ok(cdns_ctrl, buf, len)) {
status = cadence_nand_slave_dma_transfer(cdns_ctrl, (void *)buf,
cdns_ctrl->io.dma,
len, DMA_TO_DEVICE);