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author | Chen-Tsung Hsieh <chentsung@chromium.org> | 2022-01-26 10:32:26 +0300 |
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committer | Pratyush Yadav <p.yadav@ti.com> | 2022-04-27 12:27:35 +0300 |
commit | 70dd83d737d8900b2d98db6dc6b928c596334d37 (patch) | |
tree | 7eb5257f3af7ca2cb517e74a1dbe43681e0dcfb5 /drivers/mtd/spi-nor | |
parent | b2d229d4ddb17db541098b83524d901257e93845 (diff) | |
download | linux-70dd83d737d8900b2d98db6dc6b928c596334d37.tar.xz |
mtd: spi-nor: core: Check written SR value in spi_nor_write_16bit_sr_and_check()
Read back Status Register 1 to ensure that the written byte match the
received value and return -EIO if read back test failed.
Without this patch, spi_nor_write_16bit_sr_and_check() only check the
second half of the 16bit. It causes errors like spi_nor_sr_unlock()
return success incorrectly when spi_nor_write_16bit_sr_and_check()
doesn't write SR successfully.
Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()")
Signed-off-by: Chen-Tsung Hsieh <chentsung@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220126073227.3401275-1-chentsung@chromium.org
Diffstat (limited to 'drivers/mtd/spi-nor')
-rw-r--r-- | drivers/mtd/spi-nor/core.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index b4f141ad9c9c..c1630131c734 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -788,6 +788,15 @@ static int spi_nor_write_16bit_sr_and_check(struct spi_nor *nor, u8 sr1) if (ret) return ret; + ret = spi_nor_read_sr(nor, sr_cr); + if (ret) + return ret; + + if (sr1 != sr_cr[0]) { + dev_dbg(nor->dev, "SR: Read back test failed\n"); + return -EIO; + } + if (nor->flags & SNOR_F_NO_READ_CR) return 0; |