diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-08-21 01:38:44 +0300 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-08-21 01:38:44 +0300 |
commit | 532c2b926dda11174700333a5dda5e3c0ee383f2 (patch) | |
tree | 518e583bd74e90c18f7dfd014e82ce011d0c732e /drivers/mfd/da9063-irq.c | |
parent | 8786583db54197b3859311870912f51cb3fca434 (diff) | |
parent | d2c9281c184bf2b768ac141a7a10586e0643695d (diff) | |
download | linux-532c2b926dda11174700333a5dda5e3c0ee383f2.tar.xz |
Merge tag 'mfd-next-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"New Drivers:
- Add Cirrus Logic Madera Codec (CS47L35, CS47L85 and CS47L90/91) driver
- Add ChromeOS EC CEC driver
- Add ROHM BD71837 PMIC driver
New Device Support:
- Add support for Dialog Semi DA9063L PMIC variant to DA9063
- Add support for Intel Ice Lake to Intel-PLSS-PCI
- Add support for X-Powers AXP806 to AXP20x
New Functionality:
- Add support for USB Charging to the ChromeOS Embedded Controller
- Add support for HDMI CEC to the ChromeOS Embedded Controller
- Add support for HDMI CEC to Intel HDMI
- Add support for accessory detection to Madera devices
- Allow individual pins to be configured via DT' wlf,csnaddr-pd
- Provide legacy platform specific EEPROM/Watchdog commands; rave-sp
Fix-upsL
- Trivial renaming/spelling fixes; cros_ec, da9063-*
- Convert to Managed Resources (devm_*); da9063-*, ti_am335x_tscadc
- Transition to helper macros/functions; da9063-*
- Constify; kempld-core
- Improve error path/messages; wm8994-core
- Disable IRQs locally instead of relying on USB subsystem; dln2
- Remove unused code; rave-sp
- New exports; sec-core
Bug Fixes:
- Fix possible false I2C transaction error; arizona-core
- Fix declared memory area size; hi655x-pmic
- Fix checksum type; rave-sp
- Fix incorrect default serial port configuration: rave-sp
- Fix incorrect coherent DMA mask for sub-devices; sm501"
* tag 'mfd-next-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (60 commits)
mfd: madera: Add register definitions for accessory detect
mfd: sm501: Set coherent_dma_mask when creating subdevices
mfd: bd71837: Devicetree bindings for ROHM BD71837 PMIC
mfd: bd71837: Core driver for ROHM BD71837 PMIC
media: platform: cros-ec-cec: Fix dependency on MFD_CROS_EC
mfd: sec-core: Export OF module alias table
mfd: as3722: Disable auto-power-on when AC OK
mfd: axp20x: Support AXP806 in I2C mode
mfd: axp20x: Add self-working mode support for AXP806
dt-bindings: mfd: axp20x: Add "self-working" mode for AXP806
mfd: wm8994: Allow to configure CS/ADDR Pulldown from dts
mfd: wm8994: Allow to configure Speaker Mode Pullup from dts
mfd: rave-sp: Emulate CMD_GET_STATUS on device that don't support it
mfd: rave-sp: Add legacy watchdog ping command translation
mfd: rave-sp: Add legacy EEPROM access command translation
mfd: rave-sp: Initialize flow control and parity of the port
mfd: rave-sp: Fix incorrectly specified checksum type
mfd: rave-sp: Remove unused defines
mfd: hi655x: Fix regmap area declared size for hi655x
mfd: ti_am335x_tscadc: Fix struct clk memory leak
...
Diffstat (limited to 'drivers/mfd/da9063-irq.c')
-rw-r--r-- | drivers/mfd/da9063-irq.c | 264 |
1 files changed, 139 insertions, 125 deletions
diff --git a/drivers/mfd/da9063-irq.c b/drivers/mfd/da9063-irq.c index 207bbfe55449..ecc0c8ce6c58 100644 --- a/drivers/mfd/da9063-irq.c +++ b/drivers/mfd/da9063-irq.c @@ -28,132 +28,145 @@ static const struct regmap_irq da9063_irqs[] = { /* DA9063 event A register */ - [DA9063_IRQ_ONKEY] = { - .reg_offset = DA9063_REG_EVENT_A_OFFSET, - .mask = DA9063_M_ONKEY, - }, - [DA9063_IRQ_ALARM] = { - .reg_offset = DA9063_REG_EVENT_A_OFFSET, - .mask = DA9063_M_ALARM, - }, - [DA9063_IRQ_TICK] = { - .reg_offset = DA9063_REG_EVENT_A_OFFSET, - .mask = DA9063_M_TICK, - }, - [DA9063_IRQ_ADC_RDY] = { - .reg_offset = DA9063_REG_EVENT_A_OFFSET, - .mask = DA9063_M_ADC_RDY, - }, - [DA9063_IRQ_SEQ_RDY] = { - .reg_offset = DA9063_REG_EVENT_A_OFFSET, - .mask = DA9063_M_SEQ_RDY, - }, + REGMAP_IRQ_REG(DA9063_IRQ_ONKEY, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_ONKEY), + REGMAP_IRQ_REG(DA9063_IRQ_ALARM, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_ALARM), + REGMAP_IRQ_REG(DA9063_IRQ_TICK, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_TICK), + REGMAP_IRQ_REG(DA9063_IRQ_ADC_RDY, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_ADC_RDY), + REGMAP_IRQ_REG(DA9063_IRQ_SEQ_RDY, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_SEQ_RDY), /* DA9063 event B register */ - [DA9063_IRQ_WAKE] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_WAKE, - }, - [DA9063_IRQ_TEMP] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_TEMP, - }, - [DA9063_IRQ_COMP_1V2] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_COMP_1V2, - }, - [DA9063_IRQ_LDO_LIM] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_LDO_LIM, - }, - [DA9063_IRQ_REG_UVOV] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_UVOV, - }, - [DA9063_IRQ_DVC_RDY] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_DVC_RDY, - }, - [DA9063_IRQ_VDD_MON] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_VDD_MON, - }, - [DA9063_IRQ_WARN] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_VDD_WARN, - }, + REGMAP_IRQ_REG(DA9063_IRQ_WAKE, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_WAKE), + REGMAP_IRQ_REG(DA9063_IRQ_TEMP, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_TEMP), + REGMAP_IRQ_REG(DA9063_IRQ_COMP_1V2, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_COMP_1V2), + REGMAP_IRQ_REG(DA9063_IRQ_LDO_LIM, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_LDO_LIM), + REGMAP_IRQ_REG(DA9063_IRQ_REG_UVOV, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_UVOV), + REGMAP_IRQ_REG(DA9063_IRQ_DVC_RDY, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_DVC_RDY), + REGMAP_IRQ_REG(DA9063_IRQ_VDD_MON, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_MON), + REGMAP_IRQ_REG(DA9063_IRQ_WARN, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_WARN), /* DA9063 event C register */ - [DA9063_IRQ_GPI0] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI0, - }, - [DA9063_IRQ_GPI1] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI1, - }, - [DA9063_IRQ_GPI2] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI2, - }, - [DA9063_IRQ_GPI3] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI3, - }, - [DA9063_IRQ_GPI4] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI4, - }, - [DA9063_IRQ_GPI5] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI5, - }, - [DA9063_IRQ_GPI6] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI6, - }, - [DA9063_IRQ_GPI7] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI7, - }, + REGMAP_IRQ_REG(DA9063_IRQ_GPI0, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI0), + REGMAP_IRQ_REG(DA9063_IRQ_GPI1, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI1), + REGMAP_IRQ_REG(DA9063_IRQ_GPI2, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI2), + REGMAP_IRQ_REG(DA9063_IRQ_GPI3, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI3), + REGMAP_IRQ_REG(DA9063_IRQ_GPI4, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI4), + REGMAP_IRQ_REG(DA9063_IRQ_GPI5, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI5), + REGMAP_IRQ_REG(DA9063_IRQ_GPI6, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI6), + REGMAP_IRQ_REG(DA9063_IRQ_GPI7, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI7), /* DA9063 event D register */ - [DA9063_IRQ_GPI8] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI8, - }, - [DA9063_IRQ_GPI9] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI9, - }, - [DA9063_IRQ_GPI10] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI10, - }, - [DA9063_IRQ_GPI11] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI11, - }, - [DA9063_IRQ_GPI12] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI12, - }, - [DA9063_IRQ_GPI13] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI13, - }, - [DA9063_IRQ_GPI14] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI14, - }, - [DA9063_IRQ_GPI15] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI15, - }, + REGMAP_IRQ_REG(DA9063_IRQ_GPI8, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI8), + REGMAP_IRQ_REG(DA9063_IRQ_GPI9, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI9), + REGMAP_IRQ_REG(DA9063_IRQ_GPI10, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI10), + REGMAP_IRQ_REG(DA9063_IRQ_GPI11, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI11), + REGMAP_IRQ_REG(DA9063_IRQ_GPI12, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI12), + REGMAP_IRQ_REG(DA9063_IRQ_GPI13, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI13), + REGMAP_IRQ_REG(DA9063_IRQ_GPI14, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI14), + REGMAP_IRQ_REG(DA9063_IRQ_GPI15, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI15), }; static const struct regmap_irq_chip da9063_irq_chip = { .name = "da9063-irq", .irqs = da9063_irqs, - .num_irqs = DA9063_NUM_IRQ, + .num_irqs = ARRAY_SIZE(da9063_irqs), + .num_regs = 4, + .status_base = DA9063_REG_EVENT_A, + .mask_base = DA9063_REG_IRQ_MASK_A, + .ack_base = DA9063_REG_EVENT_A, + .init_ack_masked = true, +}; + +static const struct regmap_irq da9063l_irqs[] = { + /* DA9063 event A register */ + REGMAP_IRQ_REG(DA9063_IRQ_ONKEY, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_ONKEY), + REGMAP_IRQ_REG(DA9063_IRQ_ADC_RDY, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_ADC_RDY), + REGMAP_IRQ_REG(DA9063_IRQ_SEQ_RDY, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_SEQ_RDY), + /* DA9063 event B register */ + REGMAP_IRQ_REG(DA9063_IRQ_WAKE, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_WAKE), + REGMAP_IRQ_REG(DA9063_IRQ_TEMP, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_TEMP), + REGMAP_IRQ_REG(DA9063_IRQ_COMP_1V2, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_COMP_1V2), + REGMAP_IRQ_REG(DA9063_IRQ_LDO_LIM, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_LDO_LIM), + REGMAP_IRQ_REG(DA9063_IRQ_REG_UVOV, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_UVOV), + REGMAP_IRQ_REG(DA9063_IRQ_DVC_RDY, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_DVC_RDY), + REGMAP_IRQ_REG(DA9063_IRQ_VDD_MON, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_MON), + REGMAP_IRQ_REG(DA9063_IRQ_WARN, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_WARN), + /* DA9063 event C register */ + REGMAP_IRQ_REG(DA9063_IRQ_GPI0, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI0), + REGMAP_IRQ_REG(DA9063_IRQ_GPI1, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI1), + REGMAP_IRQ_REG(DA9063_IRQ_GPI2, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI2), + REGMAP_IRQ_REG(DA9063_IRQ_GPI3, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI3), + REGMAP_IRQ_REG(DA9063_IRQ_GPI4, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI4), + REGMAP_IRQ_REG(DA9063_IRQ_GPI5, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI5), + REGMAP_IRQ_REG(DA9063_IRQ_GPI6, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI6), + REGMAP_IRQ_REG(DA9063_IRQ_GPI7, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI7), + /* DA9063 event D register */ + REGMAP_IRQ_REG(DA9063_IRQ_GPI8, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI8), + REGMAP_IRQ_REG(DA9063_IRQ_GPI9, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI9), + REGMAP_IRQ_REG(DA9063_IRQ_GPI10, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI10), + REGMAP_IRQ_REG(DA9063_IRQ_GPI11, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI11), + REGMAP_IRQ_REG(DA9063_IRQ_GPI12, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI12), + REGMAP_IRQ_REG(DA9063_IRQ_GPI13, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI13), + REGMAP_IRQ_REG(DA9063_IRQ_GPI14, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI14), + REGMAP_IRQ_REG(DA9063_IRQ_GPI15, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI15), +}; +static const struct regmap_irq_chip da9063l_irq_chip = { + .name = "da9063l-irq", + .irqs = da9063l_irqs, + .num_irqs = ARRAY_SIZE(da9063l_irqs), .num_regs = 4, .status_base = DA9063_REG_EVENT_A, .mask_base = DA9063_REG_IRQ_MASK_A, @@ -163,6 +176,7 @@ static const struct regmap_irq_chip da9063_irq_chip = { int da9063_irq_init(struct da9063 *da9063) { + const struct regmap_irq_chip *irq_chip; int ret; if (!da9063->chip_irq) { @@ -170,10 +184,15 @@ int da9063_irq_init(struct da9063 *da9063) return -EINVAL; } - ret = regmap_add_irq_chip(da9063->regmap, da9063->chip_irq, + if (da9063->type == PMIC_TYPE_DA9063) + irq_chip = &da9063_irq_chip; + else + irq_chip = &da9063l_irq_chip; + + ret = devm_regmap_add_irq_chip(da9063->dev, da9063->regmap, + da9063->chip_irq, IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED, - da9063->irq_base, &da9063_irq_chip, - &da9063->regmap_irq); + da9063->irq_base, irq_chip, &da9063->regmap_irq); if (ret) { dev_err(da9063->dev, "Failed to reguest IRQ %d: %d\n", da9063->chip_irq, ret); @@ -182,8 +201,3 @@ int da9063_irq_init(struct da9063 *da9063) return 0; } - -void da9063_irq_exit(struct da9063 *da9063) -{ - regmap_del_irq_chip(da9063->chip_irq, da9063->regmap_irq); -} |