diff options
| author | Thierry Reding <treding@nvidia.com> | 2014-11-24 18:29:40 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-01-27 12:14:39 +0300 |
| commit | 92f0e073ed213a1af673a9ee414339feb9738809 (patch) | |
| tree | d5513b8ee708a285e20b78a691af238f65a8a45b /drivers/gpu | |
| parent | 9c0b4ca1123e5b05daeabaa1879ff1fcebd5f9e1 (diff) | |
| download | linux-92f0e073ed213a1af673a9ee414339feb9738809.tar.xz | |
drm/tegra: dsi: Soft-reset controller on ->disable
This reset is necessary to properly clean up the internal state of the
controller.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/tegra/dsi.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c index e967ae1d6ca6..60b802205546 100644 --- a/drivers/gpu/drm/tegra/dsi.c +++ b/drivers/gpu/drm/tegra/dsi.c @@ -724,6 +724,30 @@ static void tegra_dsi_disable(struct tegra_dsi *dsi) usleep_range(5000, 10000); } +static void tegra_dsi_soft_reset(struct tegra_dsi *dsi) +{ + u32 value; + + value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); + value &= ~DSI_POWER_CONTROL_ENABLE; + tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); + + usleep_range(300, 1000); + + value = tegra_dsi_readl(dsi, DSI_POWER_CONTROL); + value |= DSI_POWER_CONTROL_ENABLE; + tegra_dsi_writel(dsi, value, DSI_POWER_CONTROL); + + usleep_range(300, 1000); + + value = tegra_dsi_readl(dsi, DSI_TRIGGER); + if (value) + tegra_dsi_writel(dsi, 0, DSI_TRIGGER); + + if (dsi->slave) + tegra_dsi_soft_reset(dsi->slave); +} + static int tegra_output_dsi_disable(struct tegra_output *output) { struct tegra_dc *dc = to_tegra_dc(output->encoder.crtc); @@ -762,6 +786,7 @@ static int tegra_output_dsi_disable(struct tegra_output *output) if (err < 0) dev_dbg(dsi->dev, "failed to idle DSI: %d\n", err); + tegra_dsi_soft_reset(dsi); tegra_dsi_disable(dsi); dsi->enabled = false; |