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| author | James Zhu <James.Zhu@amd.com> | 2019-12-16 23:31:07 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-12-23 22:56:37 +0300 |
| commit | 6eed6cc142345d0e7da4d54d0a58c28074ec29a3 (patch) | |
| tree | 30d927a7ae884221869f0e552552776965378e8d /drivers/gpu | |
| parent | 1e2c6d5582ee41b6e541c9f601497c2f02d497b7 (diff) | |
| download | linux-6eed6cc142345d0e7da4d54d0a58c28074ec29a3.tar.xz | |
drm/amdgpu: Add mmCOMPUTE_STATIC_THREAD_MGMT_SE4-7 to support Arcturus
Arcturus has 8 SEs. Add mmCOMPUTE_STATIC_THREAD_MGMT_SE4-7
for EDC GPR _workarounds,
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h index 2bfaaa8157d0..d984c916df80 100644 --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h @@ -2224,6 +2224,14 @@ #define mmCOMPUTE_STATIC_THREAD_MGMT_SE2_BASE_IDX 0 #define mmCOMPUTE_STATIC_THREAD_MGMT_SE3 0x0e1a #define mmCOMPUTE_STATIC_THREAD_MGMT_SE3_BASE_IDX 0 +#define mmCOMPUTE_STATIC_THREAD_MGMT_SE4 0x0e25 +#define mmCOMPUTE_STATIC_THREAD_MGMT_SE4_BASE_IDX 0 +#define mmCOMPUTE_STATIC_THREAD_MGMT_SE5 0x0e26 +#define mmCOMPUTE_STATIC_THREAD_MGMT_SE5_BASE_IDX 0 +#define mmCOMPUTE_STATIC_THREAD_MGMT_SE6 0x0e27 +#define mmCOMPUTE_STATIC_THREAD_MGMT_SE6_BASE_IDX 0 +#define mmCOMPUTE_STATIC_THREAD_MGMT_SE7 0x0e28 +#define mmCOMPUTE_STATIC_THREAD_MGMT_SE7_BASE_IDX 0 #define mmCOMPUTE_RESTART_X 0x0e1b #define mmCOMPUTE_RESTART_X_BASE_IDX 0 #define mmCOMPUTE_RESTART_Y 0x0e1c |