diff options
| author | Hawking Zhang <Hawking.Zhang@amd.com> | 2020-11-13 12:21:14 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-11-14 01:29:45 +0300 |
| commit | 1c990e7801f0c003d27a56a4ac9f42d6d95e48e8 (patch) | |
| tree | 594fa4a93fd3dead17e579dca26624b8451ebd01 /drivers/gpu | |
| parent | 8279bb4ec78568a34c4102e723df170b49fb7c33 (diff) | |
| download | linux-1c990e7801f0c003d27a56a4ac9f42d6d95e48e8.tar.xz | |
drm/amdgpu: declare smuio callback function as static
fix -Wmissing-protoypes warning
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/smuio_v11_0.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/smuio_v9_0.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/smuio_v11_0.c b/drivers/gpu/drm/amd/amdgpu/smuio_v11_0.c index 137b4100939f..e9c474c217ec 100644 --- a/drivers/gpu/drm/amd/amdgpu/smuio_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/smuio_v11_0.c @@ -35,7 +35,7 @@ static u32 smuio_v11_0_get_rom_data_offset(struct amdgpu_device *adev) return SOC15_REG_OFFSET(SMUIO, 0, mmROM_DATA); } -void smuio_v11_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable) +static void smuio_v11_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable) { u32 def, data; @@ -56,7 +56,7 @@ void smuio_v11_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable WREG32_SOC15(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0, data); } -void smuio_v11_0_get_clock_gating_state(struct amdgpu_device *adev, u32 *flags) +static void smuio_v11_0_get_clock_gating_state(struct amdgpu_device *adev, u32 *flags) { u32 data; diff --git a/drivers/gpu/drm/amd/amdgpu/smuio_v9_0.c b/drivers/gpu/drm/amd/amdgpu/smuio_v9_0.c index c9c3e30b20f7..8417890af227 100644 --- a/drivers/gpu/drm/amd/amdgpu/smuio_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/smuio_v9_0.c @@ -35,7 +35,7 @@ static u32 smuio_v9_0_get_rom_data_offset(struct amdgpu_device *adev) return SOC15_REG_OFFSET(SMUIO, 0, mmROM_DATA); } -void smuio_v9_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable) +static void smuio_v9_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable) { u32 def, data; @@ -56,7 +56,7 @@ void smuio_v9_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable) WREG32_SOC15(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0, data); } -void smuio_v9_0_get_clock_gating_state(struct amdgpu_device *adev, u32 *flags) +static void smuio_v9_0_get_clock_gating_state(struct amdgpu_device *adev, u32 *flags) { u32 data; |