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authorThierry Reding <treding@nvidia.com>2018-11-19 13:27:39 +0300
committerThierry Reding <treding@nvidia.com>2018-11-27 19:18:26 +0300
commitb7c61d511df4404c9bbc8f4b987059c55abfe2b4 (patch)
tree463e9e3bd863484d5bd2ba341b4d3e5a7c68f15b /drivers/gpu/host1x
parent651022382c7f8da46cb4872a545ee1da6d097d2a (diff)
downloadlinux-b7c61d511df4404c9bbc8f4b987059c55abfe2b4.tar.xz
gpu: host1x: Resize channel register region on Tegra186 and later
The register region allocated per channel was decreased from 16384 bytes to 256 bytes on Tegra186 and later. Resize the region to make sure every channel (instead of only the first) is properly programmed. Suggested-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/host1x')
-rw-r--r--drivers/gpu/host1x/hw/channel_hw.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/host1x/hw/channel_hw.c b/drivers/gpu/host1x/hw/channel_hw.c
index d188f9068b91..95ea81172a83 100644
--- a/drivers/gpu/host1x/hw/channel_hw.c
+++ b/drivers/gpu/host1x/hw/channel_hw.c
@@ -26,7 +26,6 @@
#include "../intr.h"
#include "../job.h"
-#define HOST1X_CHANNEL_SIZE 16384
#define TRACE_MAX_LENGTH 128U
static void trace_write_gather(struct host1x_cdma *cdma, struct host1x_bo *bo,
@@ -203,7 +202,11 @@ static void enable_gather_filter(struct host1x *host,
static int host1x_channel_init(struct host1x_channel *ch, struct host1x *dev,
unsigned int index)
{
- ch->regs = dev->regs + index * HOST1X_CHANNEL_SIZE;
+#if HOST1X_HW < 6
+ ch->regs = dev->regs + index * 0x4000;
+#else
+ ch->regs = dev->regs + index * 0x100;
+#endif
enable_gather_filter(dev, ch);
return 0;
}