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| author | Dmitry Osipenko <digetx@gmail.com> | 2015-06-28 22:27:02 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-10-02 15:40:12 +0300 |
| commit | 3fe2c7d4c85b4557c9772ff16f31ddc18cfd2521 (patch) | |
| tree | a440230ae2d5156f2e157f6e4549256878da0752 /drivers/gpu/host1x | |
| parent | 6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f (diff) | |
| download | linux-3fe2c7d4c85b4557c9772ff16f31ddc18cfd2521.tar.xz | |
gpu: host1x: Fix MLOCK's debug info
MLOCK's debug info, spewed on CDMA timeout, contains meaningless MLOCK
owner channel ID because HOST1X_SYNC_MLOCK_OWNER_CHID_F() returns shifted
value, while unshifted should be used. Fix it by changing '_F' to '_V'.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-By: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/host1x')
| -rw-r--r-- | drivers/gpu/host1x/hw/debug_hw.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/host1x/hw/hw_host1x01_sync.h | 8 | ||||
| -rw-r--r-- | drivers/gpu/host1x/hw/hw_host1x02_sync.h | 8 | ||||
| -rw-r--r-- | drivers/gpu/host1x/hw/hw_host1x04_sync.h | 8 |
4 files changed, 13 insertions, 13 deletions
diff --git a/drivers/gpu/host1x/hw/debug_hw.c b/drivers/gpu/host1x/hw/debug_hw.c index 791de9351eeb..cc3f1825c735 100644 --- a/drivers/gpu/host1x/hw/debug_hw.c +++ b/drivers/gpu/host1x/hw/debug_hw.c @@ -298,7 +298,7 @@ static void host1x_debug_show_mlocks(struct host1x *host, struct output *o) host1x_sync_readl(host, HOST1X_SYNC_MLOCK_OWNER(i)); if (HOST1X_SYNC_MLOCK_OWNER_CH_OWNS_V(owner)) host1x_debug_output(o, "%d: locked by channel %d\n", - i, HOST1X_SYNC_MLOCK_OWNER_CHID_F(owner)); + i, HOST1X_SYNC_MLOCK_OWNER_CHID_V(owner)); else if (HOST1X_SYNC_MLOCK_OWNER_CPU_OWNS_V(owner)) host1x_debug_output(o, "%d: locked by cpu\n", i); else diff --git a/drivers/gpu/host1x/hw/hw_host1x01_sync.h b/drivers/gpu/host1x/hw/hw_host1x01_sync.h index ac704e579977..31238c285d46 100644 --- a/drivers/gpu/host1x/hw/hw_host1x01_sync.h +++ b/drivers/gpu/host1x/hw/hw_host1x01_sync.h @@ -131,12 +131,12 @@ static inline u32 host1x_sync_mlock_owner_r(unsigned int id) } #define HOST1X_SYNC_MLOCK_OWNER(id) \ host1x_sync_mlock_owner_r(id) -static inline u32 host1x_sync_mlock_owner_chid_f(u32 v) +static inline u32 host1x_sync_mlock_owner_chid_v(u32 v) { - return (v & 0xf) << 8; + return (v >> 8) & 0xf; } -#define HOST1X_SYNC_MLOCK_OWNER_CHID_F(v) \ - host1x_sync_mlock_owner_chid_f(v) +#define HOST1X_SYNC_MLOCK_OWNER_CHID_V(v) \ + host1x_sync_mlock_owner_chid_v(v) static inline u32 host1x_sync_mlock_owner_cpu_owns_v(u32 r) { return (r >> 1) & 0x1; diff --git a/drivers/gpu/host1x/hw/hw_host1x02_sync.h b/drivers/gpu/host1x/hw/hw_host1x02_sync.h index 4495401525e8..540c7b65995f 100644 --- a/drivers/gpu/host1x/hw/hw_host1x02_sync.h +++ b/drivers/gpu/host1x/hw/hw_host1x02_sync.h @@ -131,12 +131,12 @@ static inline u32 host1x_sync_mlock_owner_r(unsigned int id) } #define HOST1X_SYNC_MLOCK_OWNER(id) \ host1x_sync_mlock_owner_r(id) -static inline u32 host1x_sync_mlock_owner_chid_f(u32 v) +static inline u32 host1x_sync_mlock_owner_chid_v(u32 v) { - return (v & 0xf) << 8; + return (v >> 8) & 0xf; } -#define HOST1X_SYNC_MLOCK_OWNER_CHID_F(v) \ - host1x_sync_mlock_owner_chid_f(v) +#define HOST1X_SYNC_MLOCK_OWNER_CHID_V(v) \ + host1x_sync_mlock_owner_chid_v(v) static inline u32 host1x_sync_mlock_owner_cpu_owns_v(u32 r) { return (r >> 1) & 0x1; diff --git a/drivers/gpu/host1x/hw/hw_host1x04_sync.h b/drivers/gpu/host1x/hw/hw_host1x04_sync.h index ef2275b5407a..3d6c8ec65934 100644 --- a/drivers/gpu/host1x/hw/hw_host1x04_sync.h +++ b/drivers/gpu/host1x/hw/hw_host1x04_sync.h @@ -131,12 +131,12 @@ static inline u32 host1x_sync_mlock_owner_r(unsigned int id) } #define HOST1X_SYNC_MLOCK_OWNER(id) \ host1x_sync_mlock_owner_r(id) -static inline u32 host1x_sync_mlock_owner_chid_f(u32 v) +static inline u32 host1x_sync_mlock_owner_chid_v(u32 v) { - return (v & 0xf) << 8; + return (v >> 8) & 0xf; } -#define HOST1X_SYNC_MLOCK_OWNER_CHID_F(v) \ - host1x_sync_mlock_owner_chid_f(v) +#define HOST1X_SYNC_MLOCK_OWNER_CHID_V(v) \ + host1x_sync_mlock_owner_chid_v(v) static inline u32 host1x_sync_mlock_owner_cpu_owns_v(u32 r) { return (r >> 1) & 0x1; |