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| author | Matt Roper <matthew.d.roper@intel.com> | 2023-04-20 00:37:02 +0300 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-20 02:33:50 +0300 |
| commit | 5737f74e294775b9fa7fb07f80212c5bdffd5476 (patch) | |
| tree | bfe357376c9a847df831684ba39526c90f7d7dbe /drivers/gpu/drm/xe/xe_step.c | |
| parent | a2db3192115d8cafa3dcae024873957929a4eae0 (diff) | |
| download | linux-5737f74e294775b9fa7fb07f80212c5bdffd5476.tar.xz | |
drm/xe/adlp: Add revid => step mapping
Setup the mapping from PCI revid to IP stepping for ADL-P (and its RPL-P
subplatform) in case this information becomes important for implementing
workarounds.
Bspec: 55376
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230419213703.3993439-1-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_step.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_step.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/xe_step.c b/drivers/gpu/drm/xe/xe_step.c index ee927dfd3eb3..bcdb4601c2f6 100644 --- a/drivers/gpu/drm/xe/xe_step.c +++ b/drivers/gpu/drm/xe/xe_step.c @@ -60,6 +60,17 @@ static const struct xe_step_info adls_revids[] = { [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display = STEP_C0 }, }; +static const struct xe_step_info adlp_revids[] = { + [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display = STEP_A0 }, + [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display = STEP_B0 }, + [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display = STEP_C0 }, + [0xC] = { COMMON_GT_MEDIA_STEP(C0), .display = STEP_D0 }, +}; + +static const struct xe_step_info adlp_rpl_revids[] = { + [0x4] = { COMMON_GT_MEDIA_STEP(C0), .display = STEP_E0 }, +}; + static const struct xe_step_info dg2_g10_revid_step_tbl[] = { [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display = STEP_A0 }, [0x1] = { COMMON_GT_MEDIA_STEP(A1), .display = STEP_A0 }, @@ -118,6 +129,12 @@ struct xe_step_info xe_step_get(struct xe_device *xe) } else if (xe->info.subplatform == XE_SUBPLATFORM_DG2_G12) { revids = dg2_g12_revid_step_tbl; size = ARRAY_SIZE(dg2_g12_revid_step_tbl); + } else if (xe->info.subplatform == XE_SUBPLATFORM_ADLP_RPLU) { + revids = adlp_rpl_revids; + size = ARRAY_SIZE(adlp_rpl_revids); + } else if (xe->info.platform == XE_ALDERLAKE_P) { + revids = adlp_revids; + size = ARRAY_SIZE(adlp_revids); } else if (xe->info.platform == XE_ALDERLAKE_S) { revids = adls_revids; size = ARRAY_SIZE(adls_revids); |