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authorMichal Wajdeczko <michal.wajdeczko@intel.com>2024-05-30 14:58:14 +0300
committerMichal Wajdeczko <michal.wajdeczko@intel.com>2024-05-31 01:02:04 +0300
commit2d3789e325e6aa91d228aa461c152d8e8f107bc4 (patch)
tree13fd7310df8bb8bda2ef7f2d00aa8c2b8ff8e37f /drivers/gpu/drm/xe/xe_gt_mcr.h
parent9d85821a58f4ff2839d7d3290e0256c1b42dd9da (diff)
downloadlinux-2d3789e325e6aa91d228aa461c152d8e8f107bc4.tar.xz
drm/xe: Split MCR initialization
The initialization order of GT topology, MCR, PAT and GuC HWconfig as done today by native/PF driver, can't be followed as-is by the VF driver, since fuse registers used in GT topology discovery will be obtained by the VF driver from the GuC in HWconfig step. While native/PF drivers need to program the HW PAT table prior to loading the GuC, this requires only multicast writes support from the MCR code, which could be initialized separately from the full MCR support that requires the GT topology to setup steering data. Split MCR initialization into two steps to avoid introducing VF specific code paths. This also fixes duplicated spin_lock inits. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: MichaƂ Winiarski <michal.winiarski@intel.com> Cc: Zhanjun Dong <zhanjun.dong@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240530115814.1284-1-michal.wajdeczko@intel.com
Diffstat (limited to 'drivers/gpu/drm/xe/xe_gt_mcr.h')
-rw-r--r--drivers/gpu/drm/xe/xe_gt_mcr.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.h b/drivers/gpu/drm/xe/xe_gt_mcr.h
index e7d03e001a49..8d119a0d5493 100644
--- a/drivers/gpu/drm/xe/xe_gt_mcr.h
+++ b/drivers/gpu/drm/xe/xe_gt_mcr.h
@@ -12,6 +12,7 @@
struct drm_printer;
struct xe_gt;
+void xe_gt_mcr_init_early(struct xe_gt *gt);
void xe_gt_mcr_init(struct xe_gt *gt);
void xe_gt_mcr_set_implicit_defaults(struct xe_gt *gt);