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authorLucas De Marchi <lucas.demarchi@intel.com>2023-11-17 20:40:49 +0300
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-12-21 19:44:39 +0300
commit0bc519d20ffa7a450bfa21c644c2de95ae8027dc (patch)
treeb56dfff2a4620146721a41a14d249bf0022ad050 /drivers/gpu/drm/xe/xe_execlist.c
parent4399e95102edfceb7a7dd7eb72cd27b776e7d38b (diff)
downloadlinux-0bc519d20ffa7a450bfa21c644c2de95ae8027dc.tar.xz
drm/xe: Remove GEN[0-9]*_ prefixes
After noticing in logs there were still mentions to GEN6 registers, it was clear commit d9b79ad275e7 ("drm/xe: Drop gen afixes from registers") didn't take care of all the afixes. Some were added later, but there are also constants and strings still using that. Continue the cleanup removing the remaining ones. To keep it consistent with code nearby, a few other changes are made: - Remove prefix in INTEL_LEGACY_64B_CONTEXT - Remove GEN8_CTX_L3LLC_COHERENT since it's unused - Rename GEN9_FREQ_SCALER to GT_FREQUENCY_SCALER v2: Use XELP_ as prefix for NUM_MOCS_ENTRIES and remove changes to MOCS_ENTRIES as this is now done as part of a previous commit (Matt Roper) Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20231117174049.527192-3-lucas.demarchi@intel.com Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_execlist.c')
-rw-r--r--drivers/gpu/drm/xe/xe_execlist.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execlist.c
index 1541fb64949c..d82b50de144e 100644
--- a/drivers/gpu/drm/xe/xe_execlist.c
+++ b/drivers/gpu/drm/xe/xe_execlist.c
@@ -28,14 +28,14 @@
#define XE_EXECLIST_HANG_LIMIT 1
-#define GEN11_SW_CTX_ID_SHIFT 37
-#define GEN11_SW_CTX_ID_WIDTH 11
+#define SW_CTX_ID_SHIFT 37
+#define SW_CTX_ID_WIDTH 11
#define XEHP_SW_CTX_ID_SHIFT 39
#define XEHP_SW_CTX_ID_WIDTH 16
-#define GEN11_SW_CTX_ID \
- GENMASK_ULL(GEN11_SW_CTX_ID_WIDTH + GEN11_SW_CTX_ID_SHIFT - 1, \
- GEN11_SW_CTX_ID_SHIFT)
+#define SW_CTX_ID \
+ GENMASK_ULL(SW_CTX_ID_WIDTH + SW_CTX_ID_SHIFT - 1, \
+ SW_CTX_ID_SHIFT)
#define XEHP_SW_CTX_ID \
GENMASK_ULL(XEHP_SW_CTX_ID_WIDTH + XEHP_SW_CTX_ID_SHIFT - 1, \
@@ -55,8 +55,8 @@ static void __start_lrc(struct xe_hw_engine *hwe, struct xe_lrc *lrc,
xe_gt_assert(hwe->gt, FIELD_FIT(XEHP_SW_CTX_ID, ctx_id));
lrc_desc |= FIELD_PREP(XEHP_SW_CTX_ID, ctx_id);
} else {
- xe_gt_assert(hwe->gt, FIELD_FIT(GEN11_SW_CTX_ID, ctx_id));
- lrc_desc |= FIELD_PREP(GEN11_SW_CTX_ID, ctx_id);
+ xe_gt_assert(hwe->gt, FIELD_FIT(SW_CTX_ID, ctx_id));
+ lrc_desc |= FIELD_PREP(SW_CTX_ID, ctx_id);
}
if (hwe->class == XE_ENGINE_CLASS_COMPUTE)
@@ -96,7 +96,7 @@ static void __xe_execlist_port_start(struct xe_execlist_port *port,
struct xe_execlist_exec_queue *exl)
{
struct xe_device *xe = gt_to_xe(port->hwe->gt);
- int max_ctx = FIELD_MAX(GEN11_SW_CTX_ID);
+ int max_ctx = FIELD_MAX(SW_CTX_ID);
if (GRAPHICS_VERx100(xe) >= 1250)
max_ctx = FIELD_MAX(XEHP_SW_CTX_ID);