diff options
| author | Jernej Skrabec <jernej.skrabec@siol.net> | 2018-03-02 00:34:38 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-03-02 10:45:49 +0300 |
| commit | 4f86e81748fe230b9cf82a7fd69884c7a08ba9d1 (patch) | |
| tree | a24d2d29845088099f740cdb1bb4a92ce3f3718b /drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | |
| parent | 6876b160b70eeab5c7e0c3888f4907502a1df4a7 (diff) | |
| download | linux-4f86e81748fe230b9cf82a7fd69884c7a08ba9d1.tar.xz | |
drm/sun4i: Add support for H3 HDMI PHY variant
While A83T HDMI PHY seems to be just customized Synopsys HDMI PHY, H3
HDMI PHY is completely custom PHY.
However, they still have many things in common like clock and reset
setup, setting sync polarity and more.
Add support for H3 HDMI PHY variant.
While documentation exists for this PHY variant, it doesn't go in great
details. Because of that, almost all settings are copied from BSP linux
4.4. Interestingly, those settings are slightly different to those found
in a older BSP with Linux 3.4. For now, no user visible difference was
found between them.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180301213442.16677-13-jernej.skrabec@siol.net
Diffstat (limited to 'drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h')
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h index 49161326ea5a..79154f0f674a 100644 --- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h +++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h @@ -146,6 +146,7 @@ struct sun8i_hdmi_phy; struct sun8i_hdmi_phy_variant { + bool has_phy_clk; void (*phy_init)(struct sun8i_hdmi_phy *phy); void (*phy_disable)(struct dw_hdmi *hdmi, struct sun8i_hdmi_phy *phy); @@ -157,6 +158,9 @@ struct sun8i_hdmi_phy_variant { struct sun8i_hdmi_phy { struct clk *clk_bus; struct clk *clk_mod; + struct clk *clk_phy; + struct clk *clk_pll0; + unsigned int rcal; struct regmap *regs; struct reset_control *rst_phy; struct sun8i_hdmi_phy_variant *variant; @@ -184,4 +188,6 @@ void sun8i_hdmi_phy_remove(struct sun8i_dw_hdmi *hdmi); void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy); const struct dw_hdmi_phy_ops *sun8i_hdmi_phy_get_ops(void); +int sun8i_phy_clk_create(struct sun8i_hdmi_phy *phy, struct device *dev); + #endif /* _SUN8I_DW_HDMI_H_ */ |