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authorMaxime Ripard <maxime.ripard@free-electrons.com>2017-12-22 17:31:27 +0300
committerMaxime Ripard <maxime.ripard@free-electrons.com>2018-01-29 14:08:48 +0300
commit1f072d6a4c637b4e068537864938b844c8190472 (patch)
treeffc2b139d636a85e8057d1eced00dbb617762aea /drivers/gpu/drm/rockchip/rockchip_drm_vop.c
parentc89e1d27f77ec47fb7517c3689442765a60be991 (diff)
downloadlinux-1f072d6a4c637b4e068537864938b844c8190472.tar.xz
drm/rockchip: Use the alpha format field in drm_format_info
Now that the drm_format_info has a alpha field to tell if a format embeds an alpha component in it, let's use it. Acked-by: Sandy huang <hjc@rock-chips.com> Reviewed-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Link: https://patchwork.freedesktop.org/patch/msgid/5a217e8c93eea6f0a7f6bc5883424b47dbb6c664.1516617243.git-series.maxime.ripard@free-electrons.com
Diffstat (limited to 'drivers/gpu/drm/rockchip/rockchip_drm_vop.c')
-rw-r--r--drivers/gpu/drm/rockchip/rockchip_drm_vop.c13
1 files changed, 1 insertions, 12 deletions
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index cd2c72389629..7715853ef90a 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -253,17 +253,6 @@ static bool is_yuv_support(uint32_t format)
}
}
-static bool is_alpha_support(uint32_t format)
-{
- switch (format) {
- case DRM_FORMAT_ARGB8888:
- case DRM_FORMAT_ABGR8888:
- return true;
- default:
- return false;
- }
-}
-
static uint16_t scl_vop_cal_scale(enum scale_mode mode, uint32_t src,
uint32_t dst, bool is_horizontal,
int vsu_mode, int *vskiplines)
@@ -789,7 +778,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane,
rb_swap = has_rb_swapped(fb->format->format);
VOP_WIN_SET(vop, win, rb_swap, rb_swap);
- if (is_alpha_support(fb->format->format)) {
+ if (fb->format->has_alpha) {
VOP_WIN_SET(vop, win, dst_alpha_ctl,
DST_FACTOR_M0(ALPHA_SRC_INVERSE));
val = SRC_ALPHA_EN(1) | SRC_COLOR_M0(ALPHA_SRC_PRE_MUL) |