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author | Maarten Lankhorst <maarten.lankhorst@canonical.com> | 2014-04-02 14:40:05 +0400 |
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committer | Maarten Lankhorst <maarten.lankhorst@canonical.com> | 2014-09-02 18:41:50 +0400 |
commit | 2f453ed4038526172292fb3250b638b3782c7f2b (patch) | |
tree | ce8ec40176f467cab73b9764b566a6e80c389953 /drivers/gpu/drm/qxl/qxl_drv.h | |
parent | 29ba89b2371d466ca68973525816cf10debc2655 (diff) | |
download | linux-2f453ed4038526172292fb3250b638b3782c7f2b.tar.xz |
drm/qxl: rework to new fence interface
Final driver! \o/
This is not a proper dma_fence because the hardware may never signal
anything, so don't use dma-buf with qxl, ever.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Diffstat (limited to 'drivers/gpu/drm/qxl/qxl_drv.h')
-rw-r--r-- | drivers/gpu/drm/qxl/qxl_drv.h | 22 |
1 files changed, 8 insertions, 14 deletions
diff --git a/drivers/gpu/drm/qxl/qxl_drv.h b/drivers/gpu/drm/qxl/qxl_drv.h index f6022b703645..116eeae843b4 100644 --- a/drivers/gpu/drm/qxl/qxl_drv.h +++ b/drivers/gpu/drm/qxl/qxl_drv.h @@ -31,6 +31,7 @@ * Definitions taken from spice-protocol, plus kernel driver specific bits. */ +#include <linux/fence.h> #include <linux/workqueue.h> #include <linux/firmware.h> #include <linux/platform_device.h> @@ -95,13 +96,6 @@ enum { QXL_INTERRUPT_IO_CMD |\ QXL_INTERRUPT_CLIENT_MONITORS_CONFIG) -struct qxl_fence { - struct qxl_device *qdev; - uint32_t num_active_releases; - uint32_t *release_ids; - struct radix_tree_root tree; -}; - struct qxl_bo { /* Protected by gem.mutex */ struct list_head list; @@ -113,13 +107,13 @@ struct qxl_bo { unsigned pin_count; void *kptr; int type; + /* Constant after initialization */ struct drm_gem_object gem_base; bool is_primary; /* is this now a primary surface */ bool hw_surf_alloc; struct qxl_surface surf; uint32_t surface_id; - struct qxl_fence fence; /* per bo fence - list of releases */ struct qxl_release *surf_create; }; #define gem_to_qxl_bo(gobj) container_of((gobj), struct qxl_bo, gem_base) @@ -191,6 +185,8 @@ enum { * spice-protocol/qxl_dev.h */ #define QXL_MAX_RES 96 struct qxl_release { + struct fence base; + int id; int type; uint32_t release_offset; @@ -284,7 +280,11 @@ struct qxl_device { uint8_t slot_gen_bits; uint64_t va_slot_mask; + /* XXX: when rcu becomes available, release_lock can be killed */ + spinlock_t release_lock; + spinlock_t fence_lock; struct idr release_idr; + uint32_t release_seqno; spinlock_t release_idr_lock; struct mutex async_io_mutex; unsigned int last_sent_io_cmd; @@ -561,10 +561,4 @@ qxl_surface_lookup(struct drm_device *dev, int surface_id); void qxl_surface_evict(struct qxl_device *qdev, struct qxl_bo *surf, bool freeing); int qxl_update_surface(struct qxl_device *qdev, struct qxl_bo *surf); -/* qxl_fence.c */ -void qxl_fence_add_release_locked(struct qxl_fence *qfence, uint32_t rel_id); -int qxl_fence_remove_release(struct qxl_fence *qfence, uint32_t rel_id); -int qxl_fence_init(struct qxl_device *qdev, struct qxl_fence *qfence); -void qxl_fence_fini(struct qxl_fence *qfence); - #endif |