diff options
| author | Sean Paul <seanpaul@chromium.org> | 2018-09-20 17:58:13 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2018-12-11 20:51:28 +0300 |
| commit | 01b09d53ad5b7e183386887cbc536dfda9f6ce65 (patch) | |
| tree | 855382532ee5de2f88f0e80273201a7f0a4ec3a6 /drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | |
| parent | 9a5e3fce4b74035ef8d5d3c5b9795e8859c69c67 (diff) | |
| download | linux-01b09d53ad5b7e183386887cbc536dfda9f6ce65.tar.xz | |
drm/msm: Remove dpu_encoder_phys_ops->hw_reset()
We call out of the virt encoder into phys only to call back into the
virt for hw reset. So remove the indirection and just call the virt
function directly.
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h')
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index 964efcc757a4..3a67bb9f9d9d 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -114,8 +114,6 @@ struct dpu_encoder_virt_ops { * @handle_post_kickoff: Do any work necessary post-kickoff work * @trigger_start: Process start event on physical encoder * @needs_single_flush: Whether encoder slaves need to be flushed - * @hw_reset: Issue HW recovery such as CTL reset and clear - * DPU_ENC_ERR_NEEDS_HW_RESET state * @irq_control: Handler to enable/disable all the encoder IRQs * @prepare_idle_pc: phys encoder can update the vsync_enable status * on idle power collapse prepare @@ -151,7 +149,6 @@ struct dpu_encoder_phys_ops { void (*handle_post_kickoff)(struct dpu_encoder_phys *phys_enc); void (*trigger_start)(struct dpu_encoder_phys *phys_enc); bool (*needs_single_flush)(struct dpu_encoder_phys *phys_enc); - void (*hw_reset)(struct dpu_encoder_phys *phys_enc); void (*irq_control)(struct dpu_encoder_phys *phys, bool enable); void (*prepare_idle_pc)(struct dpu_encoder_phys *phys_enc); void (*restore)(struct dpu_encoder_phys *phys); @@ -342,15 +339,6 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init( */ void dpu_encoder_helper_trigger_start(struct dpu_encoder_phys *phys_enc); -/** - * dpu_encoder_helper_hw_reset - issue ctl hw reset - * This helper function may be optionally specified by physical - * encoders if they require ctl hw reset. If state is currently - * DPU_ENC_ERR_NEEDS_HW_RESET, it is set back to DPU_ENC_ENABLED. - * @phys_enc: Pointer to physical encoder structure - */ -void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc); - static inline enum dpu_3d_blend_mode dpu_encoder_helper_get_3d_blend_mode( struct dpu_encoder_phys *phys_enc) { |