diff options
| author | Rob Clark <robdclark@chromium.org> | 2022-05-29 21:04:23 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2022-07-06 18:42:57 +0300 |
| commit | 36bbfdb8bcb62752966211de1c0b9ee5fd972305 (patch) | |
| tree | ffd7edeaf6ad1f329c7133642d01f20298ee9c1e /drivers/gpu/drm/msm/adreno/adreno_device.c | |
| parent | 9bec4399af223edba58ccb66c406b10878ef45b3 (diff) | |
| download | linux-36bbfdb8bcb62752966211de1c0b9ee5fd972305.tar.xz | |
drm/msm/adreno: Allow larger address space size
The restriction to 4G was strictly to work around 64b math bug in some
versions of SQE firmware. This appears to be fixed in a650+ SQE fw, so
allow a larger address space size on these devices.
Also, add a modparam override for debugging and igt.
v2: Send the right version of the patch (ie. the one that actually
compiles)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/487601/
Link: https://lore.kernel.org/r/20220529180428.2577832-1-robdclark@gmail.com
Diffstat (limited to 'drivers/gpu/drm/msm/adreno/adreno_device.c')
| -rw-r--r-- | drivers/gpu/drm/msm/adreno/adreno_device.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index 87be25aec540..0e45b442d85f 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -316,6 +316,7 @@ static const struct adreno_info gpulist[] = { .init = a6xx_gpu_init, .zapfw = "a650_zap.mdt", .hwcg = a650_hwcg, + .address_space_size = SZ_16G, }, { .rev = ADRENO_REV(6, 6, 0, ANY_ID), .revn = 660, @@ -329,6 +330,7 @@ static const struct adreno_info gpulist[] = { .init = a6xx_gpu_init, .zapfw = "a660_zap.mdt", .hwcg = a660_hwcg, + .address_space_size = SZ_16G, }, { .rev = ADRENO_REV(6, 3, 5, ANY_ID), .fw = { @@ -339,6 +341,7 @@ static const struct adreno_info gpulist[] = { .inactive_period = DRM_MSM_INACTIVE_PERIOD, .init = a6xx_gpu_init, .hwcg = a660_hwcg, + .address_space_size = SZ_16G, }, { .rev = ADRENO_REV(6, 8, 0, ANY_ID), .revn = 680, |