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authorJesse Barnes <jbarnes@virtuousgeek.org>2013-09-26 01:04:32 +0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-10-01 09:45:41 +0400
commitafc85b9d9e617e602006d8766d04e0b8ac9c1b74 (patch)
tree1cc35f1e87f2a357214808c4c85ff2fa8f21d26a /drivers/gpu/drm/i915/intel_panel.c
parent573e74adbd13dff6a5d88aff4d7b19410fc2cb9a (diff)
downloadlinux-afc85b9d9e617e602006d8766d04e0b8ac9c1b74.tar.xz
drm/i915/vlv: hack to init backlight regs if BIOS fails to do so v2
Still digging up the actual VBT info for this, but wanted to get this out there for testing, or in case others are also bugged by this. This can happen if you boot with an external display connected. In that case, the attached eDP backlight modulation frequency may not be programmed, so we need to use something (in this case the value my BIOS normally programs with just the internal display enabled). v2: fix masking and magic value in read_blc_pwm_ctl (Jani) Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67732 Tested-by: shui yangwei <yangweix.shui@intel.com> (v1) Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_panel.c')
-rw-r--r--drivers/gpu/drm/i915/intel_panel.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 8f025c694733..54684168de1e 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -372,6 +372,9 @@ static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
I915_WRITE(BLC_PWM_CTL2,
dev_priv->regfile.saveBLC_PWM_CTL2);
}
+
+ if (IS_VALLEYVIEW(dev) && !val)
+ val = 0x0f42ffff;
}
return val;
@@ -629,10 +632,24 @@ set_level:
spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
}
+/* FIXME: use VBT vals to init PWM_CTL and PWM_CTL2 correctly */
+static void intel_panel_init_backlight_regs(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ if (IS_VALLEYVIEW(dev)) {
+ u32 cur_val = I915_READ(BLC_PWM_CTL) &
+ BACKLIGHT_DUTY_CYCLE_MASK;
+ I915_WRITE(BLC_PWM_CTL, (0xf42 << 16) | cur_val);
+ }
+}
+
static void intel_panel_init_backlight(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
+ intel_panel_init_backlight_regs(dev);
+
dev_priv->backlight.level = intel_panel_get_backlight(dev);
dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
}