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authorMichal Wajdeczko <michal.wajdeczko@intel.com>2017-10-24 13:50:56 +0300
committerChris Wilson <chris@chris-wilson.co.uk>2017-10-26 23:35:21 +0300
commitbad7b7e674cf94775cf86a7c4331bab61d79d7ea (patch)
tree1e4b83a185fa48ec878407d2275a3afe940ae3af /drivers/gpu/drm/i915/intel_huc.c
parentc41937fd994a449b4e862826d7eb9f366f6d33e9 (diff)
downloadlinux-bad7b7e674cf94775cf86a7c4331bab61d79d7ea.tar.xz
drm/i915/huc: Use helper function while waiting for DMA completion
Waiting for DMA status register can be done with dedicated function. Lets use it as additional bonus will be smaller driver footprint. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20171024105056.43276-1-michal.wajdeczko@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_huc.c')
-rw-r--r--drivers/gpu/drm/i915/intel_huc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index c8a48cbc2b7d..98d17254593c 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -151,7 +151,7 @@ static int huc_ucode_xfer(struct intel_uc_fw *huc_fw, struct i915_vma *vma)
I915_WRITE(DMA_CTRL, _MASKED_BIT_ENABLE(HUC_UKERNEL | START_DMA));
/* Wait for DMA to finish */
- ret = wait_for((I915_READ(DMA_CTRL) & START_DMA) == 0, 100);
+ ret = intel_wait_for_register_fw(dev_priv, DMA_CTRL, START_DMA, 0, 100);
DRM_DEBUG_DRIVER("HuC DMA transfer wait over with ret %d\n", ret);