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author | Sagar Arun Kamble <sagar.a.kamble@intel.com> | 2015-09-30 19:57:37 +0300 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-10-01 19:12:17 +0300 |
commit | 9d91a1bfae7d12eb2c91006dc977d9bac9000a30 (patch) | |
tree | f6a79cf8de1bc2bdc23070355a8fb88645d26a43 /drivers/gpu/drm/i915/intel_guc_loader.c | |
parent | 923c124107840d58c5002cc19734310743501811 (diff) | |
download | linux-9d91a1bfae7d12eb2c91006dc977d9bac9000a30.tar.xz |
drm/i915/guc: Don't forward flip interrupts to GuC
Due to flip interrupts GuC stays awake always and GT does not enter
RC6. Do not route those interrupts to GuC for now. Driver won't touch
DE_GUCRMR register and leave it as what default value.
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Reviewed-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc_loader.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_guc_loader.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c index 5d17b63c107c..f87d833aa5ca 100644 --- a/drivers/gpu/drm/i915/intel_guc_loader.c +++ b/drivers/gpu/drm/i915/intel_guc_loader.c @@ -90,9 +90,6 @@ static void direct_interrupts_to_host(struct drm_i915_private *dev_priv) for_each_ring(ring, dev_priv, i) I915_WRITE(RING_MODE_GEN7(ring), irqs); - /* tell DE to send nothing to GuC */ - I915_WRITE(DE_GUCRMR, ~0); - /* route all GT interrupts to the host */ I915_WRITE(GUC_BCS_RCS_IER, 0); I915_WRITE(GUC_VCS2_VCS1_IER, 0); @@ -110,13 +107,6 @@ static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv) for_each_ring(ring, dev_priv, i) I915_WRITE(RING_MODE_GEN7(ring), irqs); - /* tell DE to send (all) flip_done to GuC */ - irqs = DERRMR_PIPEA_PRI_FLIP_DONE | DERRMR_PIPEA_SPR_FLIP_DONE | - DERRMR_PIPEB_PRI_FLIP_DONE | DERRMR_PIPEB_SPR_FLIP_DONE | - DERRMR_PIPEC_PRI_FLIP_DONE | DERRMR_PIPEC_SPR_FLIP_DONE; - /* Unmasked bits will cause GuC response message to be sent */ - I915_WRITE(DE_GUCRMR, ~irqs); - /* route USER_INTERRUPT to Host, all others are sent to GuC. */ irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT | GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT; |