diff options
| author | Imre Deak <imre.deak@intel.com> | 2017-10-03 12:51:59 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2017-10-04 11:38:33 +0300 |
| commit | b7208a3f3e52791571df064fb96025ad48edd1bf (patch) | |
| tree | ba6b33aa901f5b09e8be65da40c981d45ce35f11 /drivers/gpu/drm/i915/intel_csr.c | |
| parent | 57522c4c87de20d8f7ad4e142a3a4334066d55ff (diff) | |
| download | linux-b7208a3f3e52791571df064fb96025ad48edd1bf.tar.xz | |
drm/i915/glk: Fix DMC/DC state idleness calculation
According to BSpec GLK like BXT needs to ignore the idle state of cores
before starting the DMC firmware's DC state handler.
Fixes: dbb28b5c3d3c ("drm/i915/DMC/GLK: Load DMC on GLK")
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171003095159.711-2-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_csr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_csr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index cdfb624eb82d..ea5d5c9645a4 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -216,7 +216,7 @@ static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv) mask = DC_STATE_DEBUG_MASK_MEMORY_UP; - if (IS_BROXTON(dev_priv)) + if (IS_GEN9_LP(dev_priv)) mask |= DC_STATE_DEBUG_MASK_CORES; /* The below bit doesn't need to be cleared ever afterwards */ |