diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-11-12 22:38:13 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-11-19 13:33:06 +0300 |
| commit | 6bb0a0e0fd358d4f9f6ce4c2d36c1f80d7496f6a (patch) | |
| tree | 6a75df2b415923971645d55d316ab30196988900 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | b2e7d636d9ad5dc7e84a95b004345cdd2fc82b2d (diff) | |
| download | linux-6bb0a0e0fd358d4f9f6ce4c2d36c1f80d7496f6a.tar.xz | |
drm/i915: Clean up FPGA_DBG/CLAIM_ER bits
Use REG_BIT() & co. for FPGA_DBG/CLAIM_ER bits.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211112193813.8224-10-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a6dcf252a70f..d9d47ab8d628 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2798,12 +2798,12 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg) #define GEN12_AUX_ERR_DBG _MMIO(0x43f4) #define FPGA_DBG _MMIO(0x42300) -#define FPGA_DBG_RM_NOCLAIM (1 << 31) +#define FPGA_DBG_RM_NOCLAIM REG_BIT(31) #define CLAIM_ER _MMIO(VLV_DISPLAY_BASE + 0x2028) -#define CLAIM_ER_CLR (1 << 31) -#define CLAIM_ER_OVERFLOW (1 << 16) -#define CLAIM_ER_CTR_MASK 0xffff +#define CLAIM_ER_CLR REG_BIT(31) +#define CLAIM_ER_OVERFLOW REG_BIT(16) +#define CLAIM_ER_CTR_MASK REG_GENMASK(15, 0) #define DERRMR _MMIO(0x44050) /* Note that HBLANK events are reserved on bdw+ */ |