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author | José Roberto de Souza <jose.souza@intel.com> | 2019-10-22 01:34:08 +0300 |
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committer | José Roberto de Souza <jose.souza@intel.com> | 2019-10-26 01:58:07 +0300 |
commit | 2d69c42e373fa1ae2d4e27f7b11e61978d07c6d3 (patch) | |
tree | f91cb6b5969635fdfb9b6a90c551e66e69472148 /drivers/gpu/drm/i915/i915_reg.h | |
parent | c442292a661bec3a32cf2a351c53c5f07da20e21 (diff) | |
download | linux-2d69c42e373fa1ae2d4e27f7b11e61978d07c6d3.tar.xz |
drm/i915/tc: Clear DKL_TX_PMD_LANE_SUS before program voltage swing
This sequence was recently added to fix internal HW sequences to
reset TC ports.
HSDES: 1507287614
HSDES: 14010071447
BSpec: 49292
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191021223408.87344-1-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 746326784a4d..7f04b6689ee0 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -10260,6 +10260,12 @@ enum skl_power_gate { _DKL_PHY2_BASE) + \ _DKL_TX_FW_CALIB) +#define _DKL_TX_PMD_LANE_SUS 0xD00 +#define DKL_TX_PMD_LANE_SUS(tc_port) _MMIO(_PORT(tc_port, \ + _DKL_PHY1_BASE, \ + _DKL_PHY2_BASE) + \ + _DKL_TX_PMD_LANE_SUS) + #define _DKL_TX_DW17 0xDC4 #define DKL_TX_DW17(tc_port) _MMIO(_PORT(tc_port, \ _DKL_PHY1_BASE, \ |